Implementing stereoscopic video processing on FPGA
Ladda ner
Typ
Examensarbete för masterexamen
Master Thesis
Master Thesis
Program
Embedded electronic system design (MPEES), MSc
Publicerad
2015
Författare
Hjartarson, Ástvaldur
Nordmark, Klas
Modellbyggare
Tidskriftstitel
ISSN
Volymtitel
Utgivare
Sammanfattning
The purpose of this thesis is to investigate the viability of using FPGA acceleration in the processing of a stereoscopic video feed. This is done by comparing speed for a given processing resolution with a software implementation, as well as investigating power and area usage. The processing performed include greyscaling, remapping, resizing, Gaussian blur and Sobel filtering. Methods for disparity map calculations are also investigated. A system capable of processing video at 60 stereo frame pairs per second was developed.
Beskrivning
Ämne/nyckelord
Informations- och kommunikationsteknik , Data- och informationsvetenskap , Information & Communication Technology , Computer and Information Science