Efficiency Study of Isolated DC-DC Converters – Through Simulation and Measurements Master’s Thesis in Electric Power Engineering Rasmus Karlsson Vetle Huse Syversen Department of Electrical Power Engineering CHALMERS UNIVERSITY OF TECHNOLOGY Gothenburg, Sweden, 2019 Master’s thesis 2019:ENM Efficiency Study of Isolated DC-DC Converters – Through Simulation and Measurements Rasmus Karlsson Vetle Huse Syversen Department of Electrical Power Engineering Chalmers University of Technology Gothenburg, Sweden 2019 Efficiency Study of Isolated DC-DC Converters Rasmus Karlsson Vetle Huse Syversen © Rasmus Karlsson, 2019. © Vetle Huse Syversen, 2019. Supervisor: Patrik Ollas, Department of Electric Power Engineering Supervisor: Robert Karlsson, Department of Electric Power Engineering Examiner: Torbjörn Thiringer, Department of Electric Power Engineering Master’s Thesis 2019:ENM Department of Electric Power Engineering Chalmers University of Technology SE-412 96 Gothenburg Telephone +46 31 772 1000 Cover: Phone and laptop chargers of flyback topology. iv Efficiency Study of Isolated DC-DC Converters Rasmus Karlsson & Vetle Huse Syversen Department of Electrical Power Engineering Chalmers University of Technology Abstract Technological advancements of new devices put higher demands on power supplies to increase their power delivering capabilities. Simultaneously, to reach emission requirements, harder regulations are instated on the energy efficiency of power con- verters. Currently, the lowest efficiencies are seen for low power DC-DC converters, were the market is dominated by converters of flyback topology. To keep up with the demand for higher power and efficiency, ways of improving the flyback’s efficiency as well as the possibility of using other converter topologies are investigated. A cri- terium for the converter topologies in this study was the need for galvanic isolation, thus the flyback, forward and LLC bridge converter were chosen for further inves- tigation. The converters were designed and then implemented for evaluation in the electronic circuit simulation software LTspice. As a validation of the simulations, electrical measurements on similar converters from phone and laptop chargers were performed. The results from the measured and simulated efficiency curves both showed similar drops in efficiency at partial loading below 20% of the rated load. From the simulations the converter with the highest attainable efficiency over the entire operating region were the LLC bridge converter followed by the forward and lastly the flyback. The largest losses in the converters were caused by the diode and transformer, however the exact loss distribution depends on component choice. The efficiency could be further increased by implementation of synchronous recti- fication, for which the losses in the LLC converter were reduced by 64.1% and the peak efficiency reached 97.3%. Keywords: DC-DC converter topology, flyback, forward, LLC, partial loading, syn- chronous rectifier. v Acknowledgements We would like to thank our supervisor Patrik Ollas for guidance, support and feed- back on our thesis. We would also like to thank Research Institutes of Sweden (RISE) for allowing us to use their facilities. In addition, we want to express our gratitude towards Torbjörn Thiringer for guidance and support and Robert Karls- son for providing us with technical equipment. Lastly we would like to thank our family members for all their support. Rasmus Karlsson & Vetle Huse Syversen, Gothenburg, June 2019 vii Contents 1 Introduction 1 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Aim & Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Thesis Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Theory 3 2.1 DC/DC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Flyback Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.1 Discontinuous Conduction Mode . . . . . . . . . . . . . . . . . 5 2.2.2 Continuous Conduction Mode . . . . . . . . . . . . . . . . . . 8 2.3 Forward Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 LLC Resonant Bridge Converter . . . . . . . . . . . . . . . . . . . . . 11 2.5 Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.6 MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.7 High Electron Mobility Transistor (HEMT) . . . . . . . . . . . . . . 20 2.8 Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2.9 Synchronous Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.10 Snubbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 2.11 Active Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.11.1 EMI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2.12 Electrical Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2.12.1 Measurement Uncertainty . . . . . . . . . . . . . . . . . . . . 29 2.13 Present Value Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3 Method 31 3.1 Review of Phone and Laptop Chargers . . . . . . . . . . . . . . . . . 31 3.1.1 Sandstrøm Model No.:S6TRLC14 . . . . . . . . . . . . . . . . 31 3.1.2 Clas Ohlson Model No.:38-7211 . . . . . . . . . . . . . . . . . 31 3.1.3 Blueparts Model No.:LAS045HCO . . . . . . . . . . . . . . . 32 3.2 Phone and Laptop Charger Efficiency . . . . . . . . . . . . . . . . . . 32 3.2.1 Electrical Measurement Equipment . . . . . . . . . . . . . . . 32 3.2.2 Electrical Measurement . . . . . . . . . . . . . . . . . . . . . . 33 3.3 Converter Design Setup . . . . . . . . . . . . . . . . . . . . . . . . . 34 3.4 Flyback Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3.4.1 Flyback Component Selection . . . . . . . . . . . . . . . . . . 38 3.5 Forward Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 ix Contents 3.5.1 Transformer Selection . . . . . . . . . . . . . . . . . . . . . . 39 3.5.2 Output Inductor and Capacitor . . . . . . . . . . . . . . . . . 40 3.5.3 MOSFET and Diode Consideration . . . . . . . . . . . . . . . 42 3.5.4 Implementation of Synchronized Rectifier (SR) . . . . . . . . . 42 3.5.5 Component Selection . . . . . . . . . . . . . . . . . . . . . . . 43 3.6 LLC Half Bridge Converter Design . . . . . . . . . . . . . . . . . . . 44 3.6.1 LLC Component Selection . . . . . . . . . . . . . . . . . . . . 47 4 Results 49 4.1 Electrical Measurements . . . . . . . . . . . . . . . . . . . . . . . . . 49 4.2 Partial Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 4.3 Component Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 4.4 Modeled Converter Current and Voltage Behaviour . . . . . . . . . . 55 4.4.1 Effects of Leakage Inductance . . . . . . . . . . . . . . . . . . 55 4.4.2 Impact of Transformer Windings in Forward Converter . . . . 56 4.5 Economical Impact of Increasing Converter Efficiency . . . . . . . . . 58 5 Discussion/Conclusion 61 6 Future work 63 A Appendix I x 1 Introduction 1.1 Background The demand for energy is constantly increasing due to rising populations and higher living standards around the world [1]. At the same time the energy consumption needs to decrease if our society is to be able to lessen the effects of climate change. Thus energy efficiency is becoming more important and higher demands are put on applications to follow these ever stricter standards. In the field of power transmis- sion, research is currently going into transitioning from the now dominant alternating current (AC) power grid into direct current (DC). In electrical devices, the conver- sion from the AC grid voltage to DC voltage is handled by a rectifier circuit followed by a DC-DC converter. Thus, if the power grid was DC, the AC-DC rectification would no longer be needed and the efficiency of the device could be increased. It also makes it more convenient to implement renewable technologies like solar pho- tovoltaic which would move the power generation directly to the consumer [2, 3]. Both the AC-DC rectifier and the DC-DC converter contributes to total losses, however most comes from the DC-DC converter. A number of DC-DC converters had their efficiencies measured at Chalmers. The tested converters were of flyback topology and had an average measured efficiency in the range of 67−81% depending on the loading [3]. By conducting a study of why these losses take place and how they could be reduced, the possibilities for higher efficiency DC-DC converters can be examined. The lowest efficiency is generally seen for low power converters as small voltage drops can have a major impact on the overall efficiency. Thus, by comparing different low power converter topologies, methods for optimizing efficiency can be evaluated. 1 1. Introduction 1.2 Aim & Scope The aim of this thesis is to identify and compare different DC-DC converter topolo- gies for low power applications in the range of 5− 15W , to establish their efficiency at rated power and behaviour during partial loading. Possibilities to further in- crease the efficiency of each converter topology is also going to be investigated. The converter efficiency study is going to be conducted through simulation, using the electronic circuit simulator LTspice. To evaluate the simulation results and establish the current state of commercial converters, electrical efficiency measurements will be performed on purchased converters having similar power levels. 1.3 Thesis Outline • 2. Theory The flyback, forward and LLC converter topology and operation is in- vestigated. A review of the key components within the converters are conducted and possibilities for further efficiency improvement are dis- cussed. The EMI, error propagation and present value analysis are also covered briefly. • 3. Method The purchased DC-DC converters are introduced and the methodology for performing electrical measurements are summarized. Then the de- sign procedure for the flyback, forward and LLC converter in LTspice is explained and the component choice is justified. • 4. Results The flyback, forward and LLC converter implemented into LTspice are evaluated in terms of power dissipation to compare their relative effi- ciency for partial loading. As well as which components are the major contributors to lowering efficiency. A short look at the effects of leakage inductance, the impact of transformer winding choice and an economical evaluation of SR are also conducted. • 5. Discussion The results obtained from the simulations and electrical measurements are discussed and compared. • 6. Future Work Description and possibilities of providing more reliable design models and implementation of further efficiency improvement topologies for future work. 2 2 Theory 2.1 DC/DC Converters Figure 2.1: Isolated DC/DC converter block diagram Almost every appliance and device in today’s household operates on DC voltage and thus require some type of voltage conversion going from the conventional (230) AC electrical outlet. Especially challenging is the DC-DC conversion for devices containing digital circuits and LED-drivers because they generally require low volt- ages. Thus, even a small voltage drop can have a large impact on the total efficiency which limits the power density of the device. A general isolated DC-DC converter is shown in Fig. 2.1, with the transformer providing electrical isolation. Due to safety requirements and high voltage conversion ratios, an isolation transformer within the converter is often a requirement [4]. The transformer provides electrical isolation and thus prevents current ground loops as well as providing the freedom to step up or step-down voltages [4]. There is also the benefit of preventing high voltage and current transients from reaching the output of the converter. As the converters in this study are designed with low output voltages, low power levels as well as galvanic isolation, the converter topologies in Table 2.1 have been selected. Typical power levels for each topology is shown to indicate when they are most commonly used. More about the topology and operation of the three DC/DC converters will be further explained in the chapters below. Table 2.1: common power range for the given topologies [5] Topology Flyback Converter Forward Converter Half-Bridge LLC Typical Power Range [W] 0 - 150 50 - 500 100 - 1000 3 2. Theory 2.2 Flyback Converter The most commonly used low power converter topology that provides galvanic in- sulation today is the flyback converter, as it can be produced at low cost due to the small component count [6]. The flyback converter, which can be seen in Fig. 2.2, is derived from the buck-boost converter with the addition of a transformer operating as a coupled inductor. Another difference from the buck-boost converter is that the flyback output voltage is the same polarity as the input. This because the polarity of the secondary transformer winding is inverted to provide a positive output volt- age during the discharge cycle. The transformer is used as energy storage during switching cycles as well as providing galvanic insulation and voltage regulation. Figure 2.2: A Flyback converter circuit model The voltage and current path during switch on and switch off are presented in Fig. 2.3. When the switch is on as shown in Fig. 2.3 (a), the primary current flows through the primary winding and charges the transformer. Due to the arrangement of the winding, a negative voltage will be induced across the secondary winding thus reverse biasing the rectifying diode, preventing the core from discharging over the load. As the primary switch turns off as shown in Fig. 2.3 (b), the polarity on the secondary winding is reversed, causing the diode to be forward biased. The flyback transformer can then freely discharge the stored energy onto the load [6, 7]. 4 2. Theory Figure 2.3: Conduction mode for a flyback converter; (a) the switch is turned on and (b) the switch is turned off. 2.2.1 Discontinuous Conduction Mode The behaviour of the current through the flyback can be defined based on two different operating modes, discontinuous conduction mode (DCM) and continues conduction mode (CCM). In this section, DCM is presented. A converter operating in DCM discharges the transformer core fully each switching cycle. The relation between input and output voltage for a flyback converter operating in DCM is Vo Vin = D √ RTs 2Lm (2.1) where Vo and Vin are the output and input voltage respectively. D is the duty cycle and Ts is the switching period, Lm is the transformer magnetizing inductance and R is the load resistance. The voltage across the switch and the transformer currents for a flyback operating in DCM can be seen in Fig. 2.4, where the switch is conducting during the time ton and blocking during time toff . During ton, current increases linearly through the magnetizing inductance and builds up magnetic flux in the transformer until the switch turns off. 5 2. Theory As the switch is turned off the voltage across the secondary winding reverses and forward biases the diode. The secondary current ISEC starts flowing and demag- netizes the core fully over the time period tDemag. The demagnetization time may vary, depending on the load. During the switch off-time toff , the voltage across the switch is the sum of input voltage and reflected output voltage. During switching a voltage ripple may appear, marked by the first red circle in Fig. 2.4, caused by resonant between switch node capacitance and leakage inductance. This voltage ripple can be reduced by implementing a snubber or active clamp circuit and is an important factor when deciding what transistor to use in the circuit [6, 7]. The time period noted tDEAD in Fig. 2.4 describes the time were ISEC has reached zero. During this time there is resonant ringing between the transformer primary winding inductance and the switch capacitance, indicated by the second red circle. By utilizing valley switching, the switching losses can be reduced drastically by turning on the switch when the ringing voltage is at its lowest point [6]. Figure 2.4: Current and voltage behaviour of a flyback operating in DCM. One of the advantages with DCM operation, is the absence of reverse recovery current from the diode. This is due to that the secondary current through the diode is allowed to go to zero, which does not occur for CCM. Another advantage is that the flyback requires a smaller inductance due to higher current di/dt which reduces the size of the magnetic components. However, the large ripple currents in DCM leads to high rms currents and increases the conduction losses in the circuit [6]. 6 2. Theory When designing a flyback converter, a design parameter called the ripple factor, KRF , is introduced [8]. This parameter allows the designer to chose a desired current ripple for the converter. The ripple factor is defined as KRF = ∆I 2Im (2.2) where KRF is the ratio between the peak to peak current ripple ∆I and the average current through the magnetizing inductance Im. The ripple current and magnetizing inductance can be calculated from ∆I = VinD Lmfs (2.3) Im = Pin VinD (2.4) where fs is the switching frequency and Pin is the input power [9]. For a converter made to operate in DCM, KRF = 1 and thus there is no DC component to the current. This can be seen in Fig. 2.4 where 2IOut(Avg) = ∆I. By combining (2.2) – (2.4), the magnetizing inductance of the transformer can be written as Lm = (Vin,minDmax)2 2PinfsKRF (2.5) The peak and rms current through the switch are then calculated as Im,peak = Im + ∆I 2 (2.6) Im,rms = √ D 3 [ 3(Im)2 + (∆I 2 )2 ] (2.7) To get an even output voltage, a filter capacitor needs to be implemented to the output. The output capacitor is thus calculated as COut = ∆Io 8fs∆VOut (2.8) where ∆VOut is the maximum allowed output voltage ripple [7]. 7 2. Theory 2.2.2 Continuous Conduction Mode The second conduction mode is continuous conduction mode (CCM) where the converter transfer function is expressed by Vo Vin = 1 n D 1−D (2.9) In this mode the output voltage only depends on the duty cycle D and the winding ratio n, which is n = Np Ns (2.10) where Np is the number of primary side windings and Ns is the number of secondary side windings [6]. The voltage across the switch and current through the transformer of a flyback in CCM is presented in Fig. 2.5. Figure 2.5: Current and voltage behaviour of a flyback operating in CCM. In this mode there is always a current flowing through one of the transformer wind- ings, thus there is no dead time and the current ripple and rms value is kept lower than for DCM. This also gets rid of the ringing usually occurring during the dead time making valley switching impossible. Due to lower rms current, CCM opera- tion is generally preferred for higher loads although it is inevitable to enter DCM when the loading decreases far enough. Thus, converters designed for CCM normal operation also features a controller made to handle DCM operation. The design steps for a flyback converter for CCM operation is similar to one for DCM operation, however now the ripple factor should be KRF < 1. This can be seen in Fig. 2.5 where 2IOUT−AV G > ∆I as there is a DC component to the current. A common value for the ripple factor is KRF = 0.4−0.8 for European appliances [8]. 8 2. Theory 2.3 Forward Converter The forward converter share many similarities with the flyback converter, however energy is not stored in the transformer, but directly transferred to an output induc- tor. This means smaller ripple currents to the output which reduces the size of the output capacitor [10]. The Forward converter is derived from the buck converter, but is implemented with a transformer, providing galvanic isolation and the possi- bility to step the voltage. The circuit topology of a forward converter can be seen in Fig 2.6. Figure 2.6: Forward converter circuit model Because the forward converter is derived from a buck converter, their transfer func- tions share some similarities, the only difference is the inclusion of the transformer turns ratio [11]. The transfer function is therefore given as Vo Vin = D Ns Np (2.11) where the relationship between the number of primary and secondary windings provides flexibility for the voltage conversion. Due to the immediate energy transfer between primary and secondary, the stored energy caused by the magnetizing current in the transformer is not discharged by the output voltage. This introduces the need of a third winding, called reset wind- ing which prevents the magnetizing current to increase for every switching cycle. The discharge behaviour of the voltage and current caused by the reset winding can be seen in Fig. 2.7, where Fig. 2.7 (a) shows the current path and voltage polarity during turn on and turn off and Fig. 2.7 (b) shows the current and voltage waveforms. [10,11]. 9 2. Theory (a) Current path and voltage polarities of the forward converter during on and off (b) Current and voltage waveforms of the forward converter during on and off. Figure 2.7: Current and voltage behaviour of forward converter during turn on and turn off. During conduction mode input voltage Vin reverse biases diode D3. The voltage reflected to the secondary side forward biases diode D1, thus voltage across the inductor can be expressed by [4, 10,11] VLout = Ns Np Vin − Vo (2.12) The inductor voltage behavior during turn on can be seen in Fig. 2.7 (b) which increases linearly with di dt = VLout Lout . (2.13) When the switch turns off, energy stored in Lout begins to discharge onto the load. The voltage over the primary winding will change polarity connecting the primary inductor in series with the input voltage causing high voltages over the switch [11]. The switch voltage VS can be calculated as VS = Vin + Np Nr Vin. (2.14) 10 2. Theory where Nr is the number of windings to the reset winding. Simultaneously, the re- flected voltage forward biases D3, providing a current path for the magnetizing current and thereby resetting the magnetic field in the transformer. On the sec- ondary side during turn-off, the voltage over the output inductor is clamped by the freewheeling diode D2 and discharges the output inductor onto the load. [4, 10, 11] 2.4 LLC Resonant Bridge Converter A resonant bridge converter is a type of bridge converter that utilizes a network of inductors and capacitors, called a resonant tank, to regulate gain as well as to achieve lower losses through zero voltage switching (ZVS). By changing the configuration of the elements within the resonant tank, different converter characteristics around a resonant switching frequency can be obtained. The topology for an LLC half- bridge converter with full wave rectification can be seen in Fig. 2.8. The resonant tank is located in between the switching bridge and rectifier stage. The bridge LLC converter requires a high number of components compared to the other topologies but is naturally able to achieve ZVS [12]. The converter is also able to operate for a wide load and still maintain high efficiency [12]. Figure 2.8: A LLC half-bridge converter with a full-wave rectifier. 11 2. Theory As indicated by its name, the resonant tank of the LLC bridge converter consists of two inductors Lr, Lm and one capacitor Cr, where Lm is the magnetizing inductance of the transformer. Because the LLC has two inductors, the circuit has two resonant frequencies and is thus also known as a multi-resonant converter. The switching bridge can either be implemented with four switches to form a full bridge, or with two to form a half bridge. The half bridge topology outputs half the voltage of a full bridge, thus the transformer require half the amount of windings. However, this has the implication that the primary current through the half bridge switches and transformer winding will be twice as high as that of the full bridge, leading to higher conduction loss. A comparison between half bridge and full bridge converters can be seen in Table 2.2. Table 2.2: Switching bridge: Half bridge compared to full bridge Irms Number of Switches Primary windings Total conduction loss for switches Transformer primary copper loss × 2 ÷ 2 ÷ 2 × 2 × 2 As for the output rectifier, it can either be implemented as a full bridge rectifier or a full wave rectifier. The difference is that the full wave rectifier uses two diodes instead of four, and two secondary side winding coils instead of one. Thus, the full wave rectifier has twice the winding losses, but half the diode losses compared to the full bridge rectifier. The voltage rating of the diodes also needs to be two times larger for the full wave rectifier. A comparison between full wave and full bridge rectifiers can be seen in Table 2.3 [13]. Table 2.3: Rectifier: Full wave compared to full bridge Diode voltage rating Number of diodes Total diode conduction losses Number of secondary windings Transformer secondary copper loss × 2 ÷ 2 ÷ 2 × 2 × 2 The operation of the LLC converter from input to output starts with the switch bridge circuit which generates a square wave voltage, with a switching frequency close to the resonant frequency of the resonant tank elements. The resonant tank acts as a filter to create a sinusoidal current and a bipolar square wave voltage, with a gain depending on the switching frequency of the switch bridge. The voltage gets scaled by the transformer ratio, rectified by the full wave rectifier and smoothed by the output capacitor. The conduction cycles can be seen in Fig. 2.9 (a) and current and voltage waveforms can be seen in Fig. 2.9 (b) [13]. It is during the dead time between t1 and t2 that the condition for ZVS occurs. 12 2. Theory (a) Current path of the LLC converter during turn on and turn off (b) Current and voltage waveforms of the LLC during switch on and off. Figure 2.9: Current and voltage behaviour of half bridge LLC converter during turn on and turn off. The LLC bridge converter resonant tank enables the possibility to step up and step down voltages while attaining low switching losses. During normal operation the gain of the resonant tank is in unity as this is the preferable operation mode that causes the converter to operate at maximum efficiency [12]. Depending on the application of the converter and on expected input and output voltage fluctuations, the minimum gain Mg(min) and maximum gain Mg(max) needed can be specified according to Mg(min) = n · Vo(min) Vin(max) (2.15) Mg(max) = n · Vo(max) Vin(min) (2.16) As previously stated, the resonant tank, is multi-resonant and its gain varies with the switching frequency. Thus, there is no duty cycle control for the bridge switches but instead the duty cycle is kept at 50% and only the switching frequency is varied. The gain of the resonant tank can be obtained from an equivalent AC circuit seen in Fig. 2.10, derived using the first harmonic approximation (FHA). Using FHA means to approximate the input square wave voltage with its first harmonic component, due to the filtering of the resonant tank. The magnitude of the fundamental voltage component from a half bridge is VFHA = 2 π VDC (2.17) 13 2. Theory The voltage across the transformer, before the rectifier, is a bipolar square wave voltage that has the fundamental component Vac(out) = 4 · n · Vo π (2.18) Figure 2.10: The equivalent AC model of the LLC converter. The input power Pin to the AC model in terms of the AC current Iac and the load Rac from (2.21) is Pin = I2 ac,rms ·Rac = Iac,peak√ 2 Rac = I2 ac,peak 2 Rac (2.19) The output power to the actual load Rout depends on the DC current Iout,DC through the load as Pout = I2 out,dc ·Rload = ( 2 π Iac,peak)2Rload = 4Rload π2 I2 ac,peak (2.20) By equating the efficiency of the converter to 100%, so that Pin = Pout, the input power corresponds to the output power and thus the equivalent AC resistance equals Rac = 8n2 π2 Rout (2.21) where n is the turns ratio of the transformer and Rout is the actual output resistance. From the equivalent LLC circuit in Fig. 2.10, it is apparent that as the AC resistance Rac changes, so does the equivalent circuit. Thus, the influence of Lr and Lm will vary with the load. Two extreme cases can be used to illustrate this. First when the loading is high, Rac has a much lower value than the magnetizing inductance Rac << Lm, thus Lm can be neglected. Secondly when the loading is zero the opposite is true, so RAC >> Lm and the resistor can be neglected. Both equivalent LC circuit will have different resonance frequencies, the first one being fr1 = 1 2π √ LrCr (2.22) where fr1 is the resonance frequency for Rac << Lm, for which the output voltage gain is one or lower [14]. The second resonance frequency is then given as fr2 = 1 2π √ (Lr + Lm)Cr (2.23) 14 2. Theory for RAC >> Lm, for which the output voltage gain is larger than one. The ratio between Lr and Lm, m = Lm Lr (2.24) can be used to describe the influence of the fr2 gain on the fr1 gain. For m = 0 the magnetizing inductance is zero and thus it wont influence the Fr1 gain. Similarly if m is very high fr2 will be too far away from fr1 to have any real impact on its gain. To be able to have a gain above and below one the ratio should be within 0 < m <∞. Another useful factor to describe the resonant gain is the quality factor Q, defined as Q = √ Lr Cr RAC (2.25) Which can also be written as Q = Lrωr RAC (2.26) where ωr is the resonant frequency of the LC circuit with elements Lr and Cr [14]. The value of Q describes how fast the voltage gain drops when deviating from fr1. For a larger Q the gain will drop faster around the resonant point and thus the influence of the gain from fr2 will be lessened. By performing an AC analysis on the equivalent circuit model from Fig. 2.10, the converter gain due to different choices of quality factors is visualized in Fig. 2.11 for m = 4. Thus for low values of Q, which is for low loads, high gains are attainable. Figure 2.11: Voltage gain for m = 4 with curves plotted for different quality factors. 15 2. Theory To achieve ZVS the current is allowed to flow through the MOSFET body diode, thus discharging the drain to source capacitance and causing the voltage across the MOSFET to go to zero. When this condition is met the gate signal can be applied to turn on the MOSFET with, in theory, no switching loss. Any operating point in Fig. 2.11 is not possible, because to achieve ZVS the converter must operate with inductive impedance. The gain plot can be divided into three areas to show the operating regions which can be seen in Fig. 2.12. Region one provides lower gain while region two provides higher gain and they are both causing inductive operation. Region three however is the capacitive region and it is avoided as ZVS no longer is possible. 0.2 0.4 0.6 0.8 1 1.2 1.4 Normalized Switching Frequency 0.5 1 1.5 2 2.5 3 G a in M g Region 1 Region 2 Region 3 Q=0.145 Q=0.175 Q=0.245 Q=0.445 Q=1.445 Q=3.5 Figure 2.12: Attainable gain for different quality factors with m = 4.5. Region 1: Inductive operation & less than unity gain. Region 2: Inductive operation & higher than unity gain. Region 3: Capacitive operation & loss of ZVS. Because the maximum attainable gain reduces with higher loading, the converter must be designed to be able to reach the gain required at the highest load condition. To help choose a Q and m for a required gain, a plot of the maximum attainable gain for different Q and m values is plotted in Fig. 2.13 16 2. Theory Figure 2.13: Maximum attainable gain for different Q and m values. 2.5 Diode A diode is a passive component that allows current to flow from anode to cathode if enough bias is applied to the terminals. The voltage applied over anode and cathode must exceed the potential barrier and is typical in the range of 0.4 − 0.7V for a common p-n diode. For applications which require a low voltage barrier potential, what is known as a Schottky diode can be used as the voltage drop is typically 0.3V [7]. Hence, together with its low conduction loss and high switching capabilities, the Schottky diode has been the preferable diode choice for low power applications [7]. The forward voltage drop and low on resistance affects the conduction loss, which is given by Pcond = VfIF (Avg) +RdI 2 F (rms) (2.27) where Vf and Rd are the forward voltage drop and on-resistance respectively. The rms current IF (rms) and average current IF (Avg) are currents flowing from anode to cathode [15]. When negative biased is applied to the diode, a small current will flow through the device. This current occurs due to minority carriers and is often negligible [7]. If the negative bias across the diode reaches the breakdown voltage rating of the diode, minority carries will contribute to the forming of an electron avalanche. This results in a large conducting current and together with the high voltage may cause destruction of the device [7]. 17 2. Theory 2.6 MOSFET The Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) is a voltage controlled transistor used for high frequency switching and low power applications. The MOSFET structure can be seen in Fig. 2.14 with the connecting terminals of drain, source and gate. Figure 2.14: N-channel MOSFET with its parasitic capacitances By applying a positive voltage at the gate, positive charges are accumulated close to the gate and the insulating layer. These charges attracts electrons in body region of the MOSFET due to the field effect, thus creating a conducting channel called an N-channel. This allows electrons to flow from source to drain and therefore current from drain to source. The current through the MOSFET causes conduction losses and is considered to be one of the major power dissipation that occurs in a MOSFET [7]. The conduction losses can be described by Pon = I2 0,rms · rDS(on) (2.28) where I0 is the output current flowing through the MOSFET, and rDS(on) is the sum of several resistances within the MOSFET [7]. In addition to conduction losses, there is also losses that occurs during turn off and turn on. They are called switching losses and are more prominent at high switching frequencies. The turn on characteristics for a MOSFET can be seen in Fig. 2.15 and is divided into three different time periods. The first period describes the voltage rise of VGS provided by an external drive circuit. When the voltage reaches the threshold value VGS(th), a conducting channel is created and current starts to flow 18 2. Theory through drain and source. As VGS continues to increase the current iD starts to rise and settles at I0 with a total rise time of tri [7]. Figure 2.15: Voltage and current behaviour during turn on of a MOSFET. The upper waveforms shows the gate to source voltage and gate current. The lower shows current and voltage relationship between drain and source. When iD = I0, voltage over drain and source will start to decrease over a time period tfv and finally stabilize at a voltage of VDS(on)) = I0 · rDS(on) (2.29) The time period consisting of tri and tfv is combined to one time period called crossover time tC described in Fig. 2.15. The overlap between the voltage and the current during tC determines the turn on switching loss which can be described by Psw(on) = fsw ∫ tfv2 tri1 vDS(t)id(t)dt (2.30) The same formula can be applied during turn off, but the time constraints will be the rise of voltage trv1 and fall of current tf i2.This can be shown by Psw(off) = fsw ∫ tfi2 trv1 vDS(t)id(t)dt (2.31) By adding (2.30) and (2.31), the total switching losses can be described as Psw = Psw(on) + Psw(off) = fsw ∫ tfv tri vDS(t)id(t)dt+ fsw ∫ tfi trv vDS(t)id(t)dt (2.32) 19 2. Theory As the significance of switching losses is determined by the amount of voltage and currents overlap. By shifting either the voltage or current to minimize the overlap- ping area opens the possibility to reduce switching losses. Such methods can allow the MOSFET to operate with either ZVS or zero current switching (ZCS) [7]. At every switching period there will also be losses associated with the gate current. This is due to the charging and discharging of the gate capacitor at every switch- ing cycle, as accumulation of charges determines the conducting behaviour of the MOSFET [10]. The accumulated gate charge Qg together with the drive voltage Vdr causes losses that can be described by Pdr = VdrQgfs (2.33) 2.7 High Electron Mobility Transistor (HEMT) The HEMT is a power switch that provides low rds(on), small gate- and output capac- itance and complete absence of reverse recover current. This opens the possibility to operate at higher switching frequencies together with low conduction losses. The structure of a generic HEMT can be seen in Fig. 2.16. It uses substrate made of silicon or silicon carbide, depending on cost and thermal conductivity requirements. A thin layer of insulation material is used to separate the transistor from the sub- strate. The Galium Nitride (GaN) has high breakdown voltage capabilities and with the combination of the AlGaN can form a highly conducting channel. The source, gate and drain are separated with a dielectric [16, 17]. Figure 2.16: Cross section of a generic GaN transistor The GaN HEMT utilizes a new mode of operation compared to other transistors. Instead of being based on a semiconductor homojunction it uses a heterojunction to obtain high electron mobility as well as high electron concentration. The bending of the electric bands caused at the interface of the GaN and AiGaN causes a region where the conduction band will fall below the fermi-level. In this intersection a 20 2. Theory "pool" of a highly conductive two-dimensional electron gas (2DEG) will be created. The resistance in this intersection is very low since the electrons are "pooled" and not dependent on movement between lattices, thus providing low conduction losses. The advantage of the 2DEG is that both the on-state resistance and the gate charge can be kept low relative to traditional MOSFET topologies even when designed with high voltage tolerance [16–18]. 2.8 Transformer Transformers are used in isolated DC/DC converters to provide electrical isolation as well as to step up or step down voltage. The transformer consists of at least two sets of windings wound around a core, used to transmit the magnetic field from the primary to secondary set of windings. The voltage induced across the N number of windings due to the changing magnetic flux φ passing through the transformer core is V (t) = N dφ dt (2.34) The magnetic flux depends on the effective magnetic cross section of the transformer core Ae and the magnetic flux density B as follows φ = B · Ae (2.35) To calculate the magnetic flux density, (2.34) and (2.35) are used together and integrated over the converter conduction interval Ts ·D [7]. This can be written as B = 1 N · Ae ∫ DTs 0 V dt = V ·DTs N · Ae (2.36) There are mainly two kinds of losses in a transformer, the core losses and winding losses. The core losses are composed of eddy current losses and hysteresis losses, but their significance will differ depending on the core material. For smaller power ranges and high frequency applications ferrite is the most commonly used material for a number of reasons [7]. Advantages with ferrite is high electrical resistance and low magnetic coercivity. However, the magnetic saturation level is low, typically around 0.3T [7]. Due to its high electrical resistance and low coercivity, the significance of eddy current loss and hysteresis loss is low. Thus enabling the transformer to operate at high frequencies. The hysteresis losses depends on the B-H curve of the particular ferrite material which can be seen in Fig. 2.17. The B-H curve can be obtained by applying a magnetic field until the material saturates and then reversing the magnetic field. The area within this curve are related to the losses, due to the polarization of the core material. These losses increases at higher frequencies due to more frequent reversal of the magnetic field. 21 2. Theory (a) Hysteresis losses in CCM (b) Hysteresis losses in DCM Figure 2.17: B-H curve and hysteresis loss when operating in the two separate conduction modes The loss can be represented as power loss per unit volume by Steinmetz’s equation Phys = kfasB b (2.37) where B is the magnetic flux density peak and k, a and b are material constants em- pirically found by curve fitting [19]. Such loss curves are provided by manufacturers of magnetic material, often showing curves for different frequencies and at different temperatures. The loss curve for the material N87 is shown in Fig. 2.18 [20]. A line equation can then be fitted to Fig. 2.18 and the loss per volume for different magnetic flux densities can be calculated from it. Figure 2.18: Power loss in kW/m3 as a function of B, at 25◦C and 100◦C. 22 2. Theory The winding losses occur due to the DC resistance in the transformer and is thus dependent on the cross section of the wires. The total winding losses includes the current flowing in the primary and secondary windings which can be described by Pc = I2 P (rms)RP + I2 S(rms)RS (2.38) Where RP and RS is the DC resistance of the primary and secondary winding which are RP = NPρlN AC,prim (2.39) and RS = NSρlN AC,sec (2.40) where AC,prim/AC,sec is the primary and secondary side winding cross section area, lN is the average length of one wire turn and ρ is the electrical resistivity of copper. When choosing the winding cross section a rule of thumb is to limit the current per square millimeter to below 5A/mm2 [8]. The design of the DC-DC converter transformer can be one of the most challenging parts of the design process, due to the sheer number of parameters that can be optimized in various ways. After the system specifications are established, a core and core material should be chosen. Choosing a core is a non-trivial process that often involves going back and fourth between different models [19]. The core ge- ometry and core material selection process in the scope of this thesis is based on the manufacturers recommendation for approximate power level for different cores. After a core suitable for the power level is chosen, the minimum number of primary windings is calculated from (2.36) Np,min = LmIpeak BsatAe (2.41) where Ipeak is the peak-current through the mosfet, Bsat is the magnetic flux at saturation and Ae is the effective magnetic cross section. If the transformer is used for energy storage as it is in a flyback converter, an air-gap is required to not saturate the core. The air-gap reduces the equivalent permeability of the core and thus increases the magnetic field that can be applied before saturation, the B-H curve for this case can be seen in Fig. 2.17. The air-gap is calculated from G = 4πAe ( N2 p 1000Lm − 1 AL ) · 10−7 (2.42) where AL is the inductance factor of the core [8]. To verify that the windings fit inside the transformer, the total winding cross section Awr needs to be less than the available winding area in the transformer Aw. The winding cross section area is calculated as Awr = Ac kF (2.43) 23 2. Theory where Ac is the area of the primary and secondary side copper windings and kF is the fill factor to account for the gaps in between the windings. A typical fill factor is 0.2 < kF < 0.25 [8]. If the condition Awr < Aw is met the design can be considered to be satisfactory. An important factor in the transformer which affects the rest of the circuit is its leakage inductance. This inductance arises from non-perfect linking of the flux from the first to the second set of windings. The leakage inductance can be minimized by winding techniques and different core shapes. However, a general formula for a rectangular core is Lleak = µ0N 2 p lNbw 3hw (2.44) where µ0 is the permeability in vacuum, bw is the width of wire coil and hw is the height of the wire coil [7]. 2.9 Synchronous Rectifier For converters made for low voltage applications the forward voltage drop of the diode can have a significant impact on the overall efficiency. In order to reduce the voltage drop and increase the efficiency it is possible to replace the passive diode with a transistor, creating a synchronous rectifier (SR). This makes it possible to exploit the transistor’s low on-resistance Rds(on) and avoid the diode forward voltage drop [21]. The SRMOSFET with its internal body diode can be seen in red, mounted on the negative output leg in Fig. 2.19. Figure 2.19: Flyback with SR implemented on the secondary side. Because a transistor is an active component as oppose to the diode, it will be nec- essary to also implement a controller. Possible control strategies available differ in complexity and implementation and they all have advantages and disadvantages. 24 2. Theory Self-driven SR control: The implementation of this SR control can bee seen in Fig. 2.20 and uses the winding polarity in the transformer itself to control the transistor. It is done by connecting the transistor gate to either the positive or negative output leg so that the transistor will turn on as the output windings changes polarity. Thus, any extra control integrated circuit won’t be needed for this case of SR [21]. Figure 2.20: Forward converter with self driven SR control method. Vds Sensing: This SR control method works by choosing two voltage reference lev- els, VTHON and VTHOFF in Fig. 2.21, and then comparing them with the transistor drain voltage to decide whether to turn the transistor on or off. The turn on voltage reference is placed so that during the transformer discharge cycle, when the transis- tor body diode starts to conduct, the resulting diode voltage drop triggers the turn on of the transistor [21]. Figure 2.21: Behaviour of the Drain-to-source voltage sensing controller 25 2. Theory As seen in Fig. 2.21 there is a turn on delay ton after the turn on threshold Von due to gate driver and comparator delays. As the transistor is conducting, the voltage drop across its on-state resistor directly represents the secondary side current. Thus, the turn off voltage can be set to VTHOFF = Vds = 0 which is the moment when the current turns zero. Due to tolerance requirements and operating delay the turn off voltage is placed a bit before zero. After the transistor has turned off the last part of the current is transmitted through the body diode. Then the transistor blocks until the next transformer discharge cycle [21]. A challenge with this design is for the sensing circuit to simultaneously be able to handle high voltages and measure very low voltages. The threshold voltages Von and Voff should be kept as low as possible, often just a few mV. The SD also needs to operate close to the body diode which puts tough requirements on the timings and accuracy of the voltage-sense circuit [21]. 2.10 Snubbers A snubber is a circuit added to a component within the DC-DC converter to relieve stresses and thus reduce its required voltage rating. The choice to add a snubber is therefore a trade-off between the cost of a higher rated component and the increase in complexity [7]. The working principle and composition of a snubber circuit differs for each area of use. Such uses are to: • Limit the voltage magnitude as well as rate of change dV dt across a device during turn off. • Limit the current magnitude as well as rate of change dI dt through a device during turn on. • Modify the switching trajectory of a switching device. In DC-DC converters of flyback topology, snubbers are most commonly used on the power transistor, output rectification diode and on the transformer primary windings [7]. To mitigate overvoltages caused by resonance between the leakage inductance of the transformer and the drain-source capacitance of the switching transistor a RCD snubber can be added. Like the name implies an RCD snubber consists of a resistor, a capacitor and a diode, connected in parallel with the transformer primary wind- ings. To decide the size of the resistor and capacitor, the largest allowable resonance voltage overshoot Vos should be defined. The greater the allowed overshoot, the less energy is needed to be dissipated by the snubber [7]. The voltage overshoot depends on the breakdown voltage of the power transistor Vds, for which it is customary to include a 10% safety margin Vds = Vds · 0.9 [22]. The overshoot is written as Vos = Vds − Vin − Vro (2.45) 26 2. Theory where Vin is the converter input voltage and Vro is the output voltage reflected to the primary side. The peak current through the clamping circuit is then defined as Ipeaksn = √ Ipeakds − Coss Lleak V 2 os (2.46) where Ipeakds is the peak current through the transistor, Coss is the output capacitance of the transistor and Lleak is the leakage inductance. The snubber current and switching frequency fs is then used to calculate the power dissipation in the snubber with the formula Psnub = 1 2fsLleak(I peak sn )2 · Vro + Vos Vos (2.47) The size of the resistor needed to dissipate this power is Rsnub = (Vro + Vos)2 Psnub (2.48) Finally the capacitor is picked based on the allowed voltage ripple across the capac- itor ∆Vsnub. The snubber capacitor is thus Csnubb > Vro + Vos ∆VsnubRsnubfs (2.49) 2.11 Active Clamp An active clamp can be used to reduce overvoltages due to leakage inductance instead of an RCD snubber and can be seen in Fig 2.22. The active clamp contains a capacitor and a transistor which are used to store and recycle energy to the load from the transformer leakage inductance. This configuration also provides ZVS similar to the turn-off snubber, thus increases the general efficiency and allows for higher switching-frequencies. The possibility to operate at higher switching frequencies occurs as energy no longer i dissipated over the resistor but recycled back to the load and allows ZVS operation. In addition to this, higher switching frequency could also reduce the size of the transformer and thus make it possible to obtain a higher power density. This is a technology in development as DC-DC converters with multiple transistors will have non-linear capacitive effects on the circuit which are not yet well understood [23]. 27 2. Theory Figure 2.22: Flyback converter with Active clamp and RCD snubber 2.11.1 EMI Electromagnetic interference (EMI) is a disturbance or noise caused by some ex- ternal source and affecting an electric component [7]. EMI should be kept within certain boundaries following the standards set for different regions of the world as well as the component applications. The term EMI encompasses disturbances with different frequency dependent modes of transfer. These are, conducted noise, cou- pled noise and radiated noise. Conducted noise is low frequent and travels through the conductor, while the coupled noise occurs at higher frequencies due to capaci- tive and magnetic coupling. At very high frequencies, wires and leads may act like antennas and radiate noise as electromagnetic waves. DC-DC converters can cause a lot of EMI due to the high power, high di dt , parasitic elements and fast switching involved in their operation [7]. This noise may then interfere with the system itself or other systems. To deal with this, EMI filters, snubbers and component shielding can be used to reduce the cause of noise and keep the noise from disturbing sensitive equipment. Dithering is another method for reducing the intensity of the switching noise. This is done by varying the switching frequency back and forth so that the emission will be spread to a wider frequency band. The PCB layout can also be designed to avoid EMI by minimizing high di dt loop area (bypass capacitors) as well as placing sensitive components far away from potential noise sources. Another design choice that affects the noise performance of the converter is the placement of the synchronous rectifier. By placing it on the positive output leg the noise from the switch through the transformer parasitic capacitor is reduced. 28 2. Theory 2.12 Electrical Measurement Efficiency measurements are going to be performed on a number of converters, which will be used as a comparison with the simulated circuits. To measure the efficiency, a setup consisting of variable resistors, a DC-supply and various electric measuring equipment is used. The input and output power from the converters are calculated by measuring the current and voltage and using P = vDC · iDC (2.50) Then, by computing the input and output power, the efficiency is ηconv = Pout Pin (2.51) 2.12.1 Measurement Uncertainty When performing real life measurements, instrument errors or uncertainty must al- ways be considered. The uncertainty is a combination of accuracy and precision, specific to the instrument in question. When using the measured quantities in cal- culation, the uncertainties must be propagated correctly. If some generic measured quantities are a, b and c and their uncertainties are δa, δb and δc. Then for addition and subtraction between these quantities, the uncertainty is [24] Q = a+ b− c (2.52) and δQ = √ δa2 + δb2 + δc2 (2.53) The reason the total uncertainty δQ is not just the addition of each contribution is because the uncertainty of an instrument follows a normal distribution and is thus probabilistic in nature [24]. The uncertainty is ±1 standard deviation from the mean of the distribution and thus there is a 68% chance the measured value falls within a ± δa. This because there are no certain bounds for the errors that (2.53) is used. For multiplication and division the equation is simplified by writing the uncertainties as percentages δa% = δa a , then Q = a · b c (2.54) and δQ% = √ δa%2 + δb%2 + δc%2 (2.55) 29 2. Theory 2.13 Present Value Analysis By increasing the converter efficiency, by for instance implementing synchronous rectification, the price of the product is going to get affected. This means that the end user is most likely going to have to pay more for the product, to later save money on the electrical bill. To analyze the benefits of investing in a converter with increased efficiency and reduced losses, the present value method is used [25]. The present value method is used as a way of relating the future savings on the power bill to the present day investment required to implement the SR. The present value (PV) is thus the present value of future profits and can be calculated as PV = n∑ i=1 ai (1 + p)i (2.56) were n is the life time of the converter counted in years, ai is the profit due to the power saved each year and p is the discount rate. The profit ai depends on the amount of saved kilowatt hours kWh from using SR and the energy price per kilowatt hour the years its in use. The discount rate p is the expected return on a investment of similar risk and is used as a way of translating future earnings to present earnings [25]. If the profit ai is equally large each year (2.56) can be rewritten as PV = a (1 p − 1 p(1 + p)n ) (2.57) 30 3 Method 3.1 Review of Phone and Laptop Chargers To investigate what efficiency can be expected from low power DC-DC converters and perform measurements of efficiency curves for comparison with simulations, three flyback converters are procured. Two where phone chargers and one a laptop charger. Their respective power, voltage and current levels are presented in Table 3.1. To analyze how the rated power level of the converter affects its performance, converters with three different rated output power levels 5W , 12W and 45W were chosen. Table 3.1: Power and voltage rating for phone chargers from Clas Ohlson and Sandstrøm as well as a laptop charger from Blueparts Converter Model Rated Power Input Voltage AC Output Voltage, DC Output Current Sandstrøm Model No.:S6TRLC14 5 W 100-240 V 5 V 1 A Clas Ohlson Model No.:38-7211 12 W 100-240 V 5 V 2.4 A Blueparts Model No.:LAS045HCO 45 W 100-240 V 19 V 2.37 A 3.1.1 Sandstrøm Model No.:S6TRLC14 This is quite a small charger with low output power. The contacts from the wall socket connects through a fuse to a diode bridge rectifier and filter capacitor on the PCB. The converter is of flyback topology and contains a transformer, a MOSFET on the primary side, as well as a diode and filter capacitor on secondary side. There is no connection between the primary and secondary side of the converter, indicating that the control method does not require direct measurement of the output voltage. The labeling on the MOSFET and diode is hard to read and is therefore hard to obtain data specification. 3.1.2 Clas Ohlson Model No.:38-7211 For this charger, the rectification step is the same as for the Sandstrøm model. The size of the components are however considerably larger due to the higher rated power. The converter primary side does not show any visible MOSFET and it can be concluded to be integrated into the control circuit. The primary and secondary side have a capacitor connected in between to reduce the EMI generated from the transformer parasitic capacitance between the primary and secondary windings [26]. The capacitor is of Y-class to ensure there is no risk for ground currents at fault. 31 3. Method The secondary side rectifying diode is of Schottky type, which has a lower forward voltage drop than a standard PN diode. 3.1.3 Blueparts Model No.:LAS045HCO The laptop charger is of flyback topology and shares some similarities to the phone chargers. However, the size of the components are increased due to its higher rated power level. The two components that occupies the most space on the PCB board are the transformer and input capacitor. To reduce losses, two Shottky diodes are connected in parallel for the output rectifier as a way of reducing the ron, while ob- taining the same forward voltage drop. The two output capacitors are also connected in parallel to obtain the required capacitance and reduce the ESR. 3.2 Phone and Laptop Charger Efficiency 3.2.1 Electrical Measurement Equipment The electrical equipment used to measure the efficiency of the procured converters is presented in Table 3.2. The current shunt was used together with the Siemens function meter. Table 3.2: List of the electrical equipment, Measurement Accuracy: ± (reading + added to final value) Component NR Component Producer Model Function Accuracy 1 Power Supply Power Supply SM300-20 DC V Supply 0.5% + 2 digit 2 True-rms Digital Multimeter Fluke 175 DC Volts 0.15% + 2 digit 3 Function Meter Siemens B1080 (DC + AC) Volts 0.5% +0.1% 4 Multimeter HP 3468A Input Current 0.17% + 6 digit 5 Current Shunt Siemens Output Current 6 Variable Resistance Ω 32 3. Method 3.2.2 Electrical Measurement The electrical measurement setup is shown in Fig. 3.1, with indicators referring to the equipment listed in Table 3.2. Figure 3.1: Setup of the electrical measurements, with numbers indicating the equipment in Table 3.2 To measure the losses of the DC-DC converter, the internal diode rectifier of the charger is bypassed. For a European voltage level of 230V AC a rectified DC voltage of 325V DC should be supplied. However, due to equipment limitations a SM300- 20 is used which can supply a DC voltage of 305.4V . An additional Fluke 175 is connected to the input together with HP 3468A, providing high resolution measure- ments of voltage and current to establish the supplied power. To obtain the output power directly, the function meter B10880 together with a 10A shunt were found suitable. In addition to power measurement, B10880 also enables the possibility to measure the output voltage and current. The setup with the function meter can be seen in Fig. 3.1 connected to the terminals of the variable resistor. 33 3. Method The measurement was conducted by gradually increasing the resistances from the lowest possible value that gives a stable output voltage and upward. Notations of input and output voltage and current were taken to calculate the efficiency. The resistance was increased to the point where the measurements became too uncertain to continue due to the low currents and the experiment were stopped. As the load rose above that of rated operation, current and generated heat became too high and the test was terminated to not damage the converters. 3.3 Converter Design Setup The three converters that are to be implemented in LTspice are based on the speci- fications in Table 3.3. The input voltage in Table 3.3 is set to be 325V DC as it is the rectified AC input of 230VAC. The design is made to resemble a phone charger and thus the output voltage is set to 5VDC. The acquired phone chargers have a power level of 5W and 12W , for this design a slightly higher power level of 15W is chosen. This was done to get a similar case to the two phone chargers. A frequency of 100kHz is used compared to the phone chargers which had a switching frequency of about 35kHz. There is a strong incentive to increase the switching frequency as this means that the size of components can be reduced as well as power to reduce charge time. Table 3.3: LTSpice design specifications Vin POut VOut Ripple Voltage Switching Frequency Vin(Nominal) Nominal Nominal Nominal Nominal 325 ± 25 V DC 15 W 5 V 50mV 100 kHz 34 3. Method 3.4 Flyback Converter The first decision when designing a flyback converter is to choose whether to operate in CCM or DCM. Because DCM has higher rms current and thus higher losses, the operating mode for the converter in Table 3.3 is chosen to operate in CCM. The rest of the design process can be summarized with the flow chart seen in Fig. 3.2. Figure 3.2: Flyback converter design flow chart. When determining the maximum duty ratio Dmax it is favorable to keep D high to lower the voltage stress on the secondary side diode. In CCM operation however, 35 3. Method the effects of sub harmonic oscillations keep the maximum duty ratio limited to D < 0.5 for most controllers. To avoid going above D = 0.5, the maximum duty cycle is set to Dmax = 0.45. In order to determine the transformer magnetizing inductance Lm, the ripple factor KRF must be established. Choosing a ripple factor comes down to balancing the benefit of low conduction losses for lowKRF and reducing transformer size by using a high KRF . For European input voltages a range of KRF = 0.4−0.8 is recommended [8]. In this design the ripple factor is set to KRF = 0.5. When KRF has been decided, the magnetizing inductance Lm is calculated according to (2.5) as Lm = (Vin,min ·Dmax)2 2PinfsKRF = 12.118mH (3.1) and the ripple current ∆I and the average current through the magnetizing induc- tance Im are calculated according to (2.3) and (2.4) as ∆I = VinD Lmfs = 0.1207A (3.2) Im = Pin VinD = 0.1207A (3.3) For the calculated magnetizing inductance, the peak current and rms current are Im,peak = Im + ∆I 2 = 0.1811A (3.4) Im,rms = √ D 3 [ 3(Im)2 + (∆I 2 )2 ] = 84.27mA (3.5) The next step is to select the core shape and core material. The E core EFD25 is selected as it fits the transfer power demand in Table 3.3 [27]. Due to the switching frequency, the material for the EFD25 is taken as N87 provided by the data sheet [28]. The worst-case operating condition is considered when the temperature of the core is 100◦C, for which N87 has a saturation flux density of 390mT . To ensure operation below magnetic saturation for N87, the minimum number of primary winding turns is calculated according to (2.41) as Np,min = LmIm,peak BsatAe = 97.02 (3.6) The turns ratio can then be obtained from the CCM transfer function (2.9), which has been slightly modified to include an estimate the diode voltage drop which is set to Vdiode = 0.3V . Thus, the turns ratio is n = Vin Vo + Vdiode Dmax 1−Dmax = 50.17 (3.7) The turns ratio gives Ns = 1.934 which is then rounded up to a complete integer and is thus Ns = 2. Recalculating the number of primary turns Np, turns ratio and duty cycle for this Ns results in n = 50, Np = 100 and D = 0.435. In order 36 3. Method to maintain the magnetizing inductance value with the new windings, a gap in the core is required. The required gap length from (2.42) is then G = 4πAe (N2 p Lm − 1 AL ) · 10−7 = 0.0365mm (3.8) At this point the wire diameters for the primary and secondary windings should be decided and compared with the available core space to see if they fit. If they don’t, the number of winding turns must be changed as shown in the flowchart of Fig. 3.2. The wire diameter for the primary and secondary side is chosen as dN1 = 0.25mm and dN2 = 1.5mm respectively. This results in current densities of IdN1 = 1.7167A/mm2 and IdN2 = 2.4868A/mm2 which both are below 5A/mm2 and therefore fulfills the requirements. The resulting winding area Awr should be smaller than the winding slot area Aw = 40.7mm2. The copper area is Ac = 8.4430mm2, using (2.43) with a fill factor of kF = 0.21 the winding area is Awr = Ac kF = 40.20mm2 (3.9) which is sufficient. The winding resistances are then calculated by (2.39) and (2.40) to RP = NPρlN AC,prim = 1.711Ω (3.10) and RS = NSρlN AC,sec = 0.951mΩ (3.11) The leakage inductance due to the number of windings and the geometry of the core is then calculated with (2.44) as Lleak = µ0N 2 p lNbw 3hw = 75.99µH (3.12) where the width of the coil slot is bW = 5.95mm and the height of the coil slot is hW = 16.4mm. The output capacitor is then selected to maintain a output voltage ripple below VOut = 50mV , from (2.8) the required capacitance is Cout = ∆Io 8fs∆VOut = 150µF (3.13) Lastly the RCD snubber is calculated for the primary switch IPN80R2K0P7 which has a breakdown voltage of 800V . Thus, from (2.45) the allowed overshoot is Vos = Vds − Vin − Vro = 145V (3.14) 37 3. Method and the snubber current from (2.46) is Ipeaksn = √ Ipeakds − Coss Lleak V 2 os = 0.178A (3.15) The power dissipated by the snubber to reduce the voltage overshoot is then calcu- lated from (2.47) to Psnub = 1 2fsLleak(I peak sn )2 · Vro + Vos Vos = 0.328W (3.16) then the value of the snubber resistor and capacitor from (2.48) and (2.49) is Rsnub = (Vro + Vos)2 Psnub = 475.8kΩ (3.17) Csnubb > Vro + Vos ∆VsnubRsnubfs = 207.6pF (3.18) All calculated parameters from the flyback design are summarized in Table 3.4. Table 3.4: Calculated parameters flyback Components Calculated Dmax 0.45 KRF 0.5 Lm 12.118mH Im,peak 0.1811A Im,rms 84.27mA Np 100 turns Ns 2 turns G 0.0365mm Awr 40.20mm2 Lleak 75.99µH COut 300µF Rsnub 475.8kΩ Csnubb 207.6pF 3.4.1 Flyback Component Selection When choosing components for the flyback converter, the parameters from Table 3.4 are used as a basis. The used components are presented with their required rating in Table 3.5. 38 3. Method Table 3.5: Selected components for flyback converter where Vbd is the breakdown voltage of the device Component Model Vbd [V] Ron[Ω] Gate Charge [C] Output Capacitor T520D337M006ATE018 18m Diode B520C, Schottky 20 1.1 SR switch FDC8884 30 19m 5.3n Primary Switch IPN80R2K0P7 800 2 9n Transformer EF(D) 25, N87 3.5 Forward Converter The design procedure of the forward converter will be executed in the following order; transformer selection, output inductor and capacitor, MOSFET and diode consideration, implementation of SR and component selection. 3.5.1 Transformer Selection One of the first values that must be established is the transformer ratio between primary and reset windings, and between primary and secondary windings. The ratio between Nr and Np is set to 1 for simplicity, giving a duty cycle of 0.5 to ensure proper demagnetization [10]. The primary and secondary ratio is computed by using (2.11), thus winding ratio is calculated as Np Ns = n = VinD VO = 27 (3.19) VO is set to 6V to account for voltage drop over the diode and output inductor [10]. The selected transformer core is selected based on core recommendation for power levels given in Table 3.3, which gives the transformer core EF(D)25 with ferrite material N87 [27]. Thus, the minimum number of turns to prevent saturation obtain from (2.41) can therefore be calculated to be N1 > VinD 1 fs BsatAe = 71.84 (3.20) With Vin = 325 V, D=0.5, Bsat = 0.39T and Ae=58mm2. To fulfill the saturation criteria and transformer ratio, primary and secondary is set to 81 and 3 respectively. As the number of winding’s has been established, next process is to verify that the winding area is able to fit the core window. The primary/reset and secondary conductor diameter is estimated to be 0.25mm and 0.5mm respectively due to the large current deviation between primary and secondary side. The total conductor area can therefore be calculated as Acu = 2π(dP2 )2NP + π(dS2 )2NS = 8.737mm2 (3.21) 39 3. Method Factor of Kcu=0.25 is included to account for insulation tape and geometric shape of the conductor. Therefore, the total winding area can be recalculated from (2.43) to be AWr = ACu Kcu = 34.948mm2 (3.22) Since AW = 40.7 mm2 > AWr = 34.948 mm2 the core criteria is fulfilled, so no further iteration is needed. As the number of windings and dimension has been established, resistance of the primary, reset winding can be calculated with (2.39) and the secondary winding resistance with (2.40). The primary and reset winding have the same number of turns and their respective resistances can therefore be calculated as RP = RR = NPρlN AC,prim = 1.42Ω (3.23) The secondary winding resistance is calculated as RS = NSρlN AC,Sec = 12.834mΩ (3.24) The transformer non-idealities caused by leakage inductance in the core is then calculated with (2.44) to Lleak = µ0N 2 p lNbw 3hw = 52.35µH (3.25) The final process of the transformer design is determination of the transformer inductance. The selected core material is N87 and primary and secondary inductance can be calculated using the inductance factor AL, giving LP = LR = ALN 2 P = 13.122mH (3.26) LS = ALN 2 S = 18µH (3.27) Another case was created with priority of reducing the core losses. This was done by increasing the primary and secondary windings while maintaining the ratio of 27. The selected turns for primary and reset windings is therefore 135 turns, which gives secondary winding 5 turns. The diameter of the secondary winding is kept the same while primary and reset windings are reduced to 0.2 mm assuming current density below 5A/mm2. 3.5.2 Output Inductor and Capacitor Since the converter is to be simulated at partial loading, a minimum ripple must be established to ensure that the output inductor is large enough to operate in CCM [10]. A reduction of 5% of the nominal load will be chosen resulting in a current of 40 3. Method IO(min) = 5%IO = 0.15A (3.28) To ensure CCM in the given operation mode, ripple current has to be less than twice of I0(min) as stated in 3.30. This will then give a maximum ripple limit of ∆IO ≤ 0.3A (3.29) As the ripple boundary has been established, the next step will be to implement the voltage across the inductor (2.14) in to (2.13) to solve for Lout. LO > (Ns NP Vin − VO) 1 ∆IO ton (3.30) The output inductor is located on the secondary side and gain given by ton from (2.11) gives ton = VO Vin NP NS 1 fs (3.31) By substituting (3.31) into (3.30), the minimum inductor requirement can be cal- culated as LO > (1− 1 Vin NP NS VO) 1 ∆IO VO 1 fs ⇒ LO > 97.44µH (3.32) To reduce the output voltage ripple, a satisfying output capacitor must be estab- lished [6]. The output ripple is given in Table 3.3 and the capacitor is calculated to be COut = ∆IO 8fs∆VOut = 7.5µF (3.33) The transformer, output inductor and capacitor has been selected and the compo- nent values for both designs are presented in Table 3.6. 41 3. Method Table 3.6: Calculated main components for both the forward converter cases Component Case 1 Case 2 Duty Cycle 0.5 0.5 n 27 27 Lout 97.44µH 97.44µH Cout 7.5µF 7.5µF Np = Nr 83 135 Ns 3 5 AWr 34.948mm2 37.856mm2 Rp = Rr 1.42Ω 3.61Ω Rs 12.834mΩ 21.39mΩ Lp = Lr 13.122mH 36.45mH Ls 18µH 50µH Lleak 52.35µH 138.48µH 3.5.3 MOSFET and Diode Consideration The MOSFET is selected by considering the maximum voltage, gate charge and RDS(on). The MOSFET experiences its maximum voltage during turn off and is described by (2.14), which gives VDS = 325V + 1 1325V = 650V (3.34) Additional design correction including derating of 20% is added to make sure the MOSFET can withstand voltages above normal operations. The remaining component values that must be implemented with respect to the design parameters are the three diodes. The justification of the diodes on the sec- ondary will be considered first. The two diodes, D1 andD2, will experience a reverse voltage (Vr) reflected by the primary side that can be calculated as Vr > (Vin NS NP ) = 12.04V (3.35) In addition to the reverse voltage criteria, the diodes must be able to conduct rms currents experienced at maximum load. The last diode of consideration isD3 located on the primary side. The diode will experience a reflected voltage of 325VDC reflected by transformer ratio 1:1 between primary and reset. The diode will operate with rms current caused by demagnetization of the transformer. 3.5.4 Implementation of Synchronized Rectifier (SR) In order to improve the efficiency further SR is implemented, thus the output diodes are replaced with switches. The components in Table 3.6 are kept the same and voltage tolerance described in (3.35) is still valid. In addition to voltage rating, tradeoffs between conduction losses and switching losses must be considered. The 42 3. Method MOSFET implementation is conducted according to the self-driven SR control seen in Fig. 2.20 where D1 and D2 are replaced with SR1 and SR2 respectively. 3.5.5 Component Selection The minimal value for the output inductor presented with partial loading tolerance described in 3.32 was determined to be 97.44 µH. Including some uncertainties, the inductance model PCV-1-104-05 with 100µH is found to be the suitable output inductance. The same procedure is considered in determination of the output ca- pacitor and the suitable model is selected as A700V106M006ATE055 which has a capacitance of 10 µF. The diodes located on the secondary side must withstand the voltage given in (3.35) and a rms current of approximately 3 A is selected due to design specifications in Table3.3. An added voltage and current tolerances are considered to ensure system robustness. Therefore, Schottky diode B520C is selected with the ability of low forward voltage and fast switching. The demagnetization diode D3 is to operate at 325V , but derating of 20% is added to preserve secure operation. The available Schottky diode in LTSpice library that fulfills the voltage tolerance criteria is UPSC600. The demagnetizing current is assumed to be very small and UPSC600 provides safe operation up to 1A. The remaining components that have to be selected are the three switches starting with the primary switch, then SR1 and SR2. The primary switch will experience high voltage of 650V and a derating of 20% is added to the final voltage tolerance to prohibit possibilities of breakdown. The IPN80R2K0P7 is chosen as the primary switch with a current rating of 3A. The SR1 and SR2 are selected to operate with a minimum voltage tolerance of 14.5 V including derating of 20%. In addition, the MOSFET must be able to a conduct current of 3A. To utilize the implementation of SR, the choice of MOSFET will be prioritized with low rds(on) and Q(g). One model that fulfill these specifications is FDC8884 provided by Onsemi and is presented together with the other components in Table 3.7. Table 3.7: Selected components for forward converter Component Model Vbd [V] Ron[Ω] Gate Charge [C] Output Inductor PCV-1-104-05 47.3m Output Capacitor A700V106M006ATE055 55m Diode 1 B520C, Schottky 20 1.1 Diode 2 B520C, Schottky 20 1.1 SR switch 1 FDC8884 30 19m 5.3n SR switch 2 FDC8884 30 19m 5.3n Primary Switch IPN80R2K0P7 800 2 9n Transformer EF(D) 25, N87 43 3. Method 3.6 LLC Half Bridge Converter Design Before designing the resonant tank, the topology for the switching bridge and output rectifier should to be decided. From Table 2.2 the half bridge is the best choice due to the low rated power and high input voltage of this application. Using the half bridge reduces the number of switches and due to the low primary side current the increase in conduction losses this brings with it is low. The output rectifier is decided by looking at Table 2.3, for a low output voltage the full wave rectifier is favorable due to its lower amount of diodes and thereby lower diode power loss. The design process for the resonant tank of an LLC bridge converter is an iterative process which can be divided as shown in Fig. 3.3. Figure 3.3: LLC half bridge design flow chart. Because the LLC converter at normal operation has a resonant tank gain of Mg = 1 and the half bridge voltage is Vhb = Vin 2 , the transformer turns ratio is 44 3. Method n = Vin 2Vo = 32.5 (3.36) The required minimum resonant tank gain is calculated according to the specifi- cations in Table 3.3 and (2.16). The expected diode voltage drop with a value of Vdiode = 0.3V is added to the output voltage, the minimum gain is thus Mg_min = 2n · (Vo_min + Vdiode) Vin_max = 0.975 (3.37) The maximal gain calculation includes the diode voltage drop Vdiode = 0.3V , and also the expected loss Vloss due to an expected operating efficiency of 90%. From (2.15) the maximum gain is Vloss = Pout 90% · 10% Iout = 0.556V (3.38) Mg_max = 2n · (Vo_max + Vdiode + Vloss) Vin_min = 1.28 (3.39) To safely reach the gain Mg = 1.28 the maximum gain for the design is set to be able to handle 110% overloading, in this case Mg_max = 1.4. Figure 2.13 is used to choose possible combinations of Q and m for Mg_max = 1.4, in this case Q = 0.445 and m = 4 are chosen The equivalent AC resistance for rated operation RAC,min is calculated from (2.21) to RAC,min = 8N2 π2 V 2 o Po,max = 1426.94Ω (3.40) The resonant inductor Lr is then calculated according to (2.26) as Lr = RACQ ωr = 1.011mH (3.41) Then from the resonant frequency equation (2.22), the resonant capacitor Cr is Cr = 1 (2πFr1)2Ls = 2.506nF (3.42) Finally, the magnetizing inductance calculated according to (2.24) is Lm = m · Lr = 4.044mH (3.43) In order to choose a transformer, the current through the magnetizing inductance needs to be established. It can be calculated by dividing (2.18) by the magnetizing reactance ωLm as follows Im_peak = VACout ωLm = 4 · n · Vo π · ωLm = 81.5mA (3.44) 45 3. Method The core shape and material are primarily taken as EFD25 as it fits the transfer power demand in Table 3.3 and with material N87 ferrite [27]. For a core temper- ature of 100◦C the N87 ferrite has a saturation flux density of 390mT . Using the peak current through the magnetizing inductance the minimum number of primary side winding turns Np,min are calculated with (2.41) to Np,min = LmIm,peak BsatAe = 14.56turns (3.45) Because the turns ratio is n = 32.5 there is no danger of saturation. Thus, the primary turns can be taken as Np = 65 and the secondary turns as Ns = 2. The required gap length to reach the magnetizing inductance from (2.42) is then G = 4πAe (N2 p Lm − 1 AL ) · 10−7 = 0.0397mm (3.46) The wire diameter for the primary side is chosen as dN1 = 0.35mm and dN2 = 1mm. This results in current densities of IdN1 = 1.222A/mm2 and IdN2 = 3.005A/mm2 which both are below 5A/mm2 and therefore fulfills the design requirements. The resulting winding area Awr should be smaller than the winding slot area Aw = 40.7mm2. The copper area is Ac = 9.395mm2, using (2.43) with a fill factor of kF = 0.24 the winding area is Awr = Ac kF = 39.15mm2 (3.47) which is sufficient. The winding resistances are then calculated by (2.39) and (2.40) to RP = NPρlN AC,prim = 0.5675Ω (3.48) and RS = NSρlN AC,sec = 2.139mΩ (3.49) In LLC converters it is common to utilize the transformer leakage inductance as part of the resonant tank inductor. Due to this, the leakage inductance is neglected and is assumed to be a part of the resonant inductor Lr. The output capacitor is calculated according to (2.8) as COut = ∆Io 8fs∆VOut = 58.9µF (3.50) All calculated parameters from the LLC converter design are summarized in Table 3.8. 46 3. Method Table 3.8: Calculated parameters for the LLC half-bridge converter. Components Calculated n 32.5 Mg_min 0.975 Mg_max 1.28 Lr 1.011mH Lm 4.044mH Cr 2.506nF Im_peak 81.5mA Np 65 turns Ns 2 turns G 0.0397mm Awr 40.7mm2 Rp 0.5675Ω Rp 2.139Ω COut 58.9µF 3.6.1 LLC Component Selection When choosing components for the LLC converter, the parameters from Table 3.8 are used as a basis. The used components are presented with their required rating in Table 3.9. Table 3.9: Selected components for LLC converter. Component Model Vbd [V] Ron[Ω] Gate Charge [C] Output Capacitor A700V566M006AT 28m Diode B520C, Schottky 20 1.1 SR switch FDC8884 30 19m 5.3n Primary Switch IPN80R2K0P7 800 2 9n Transformer EF(D) 25, N87 47 3. Method 48 4 Results 4.1 Electrical Measurements In this section the efficiency at partial loading of existing DC-DC converters are evaluated. The efficiency curve for three flyback converters of different power levels can be seen in Fig. 4.1. 0 20 40 60 80 100 Loading [%] 40 50 60 70 80 90 100 E ff ic ie n c y [ % ] Flyback 12W Flyback 5W Flyback 45W Figure 4.1: Efficiency curve from electrical measurements on three different flyback converters. The converter curves in Fig. 4.1 show similar behaviour and provide a fairly con- sistent efficiency from 20% to rated loading. As the load drops below 20% the converters experience severe drops in efficiency. The data points from operation below 20% of load current shows some variation from point to point. This may be partly due to the measurement equipment error shown in Table A.1-A.3 and also due to the low current drawn at these loads. Thus, a small current variation can have a noticeable impact on the calculated efficiency. Above rated load the 5W and 12W converter efficiency drops which may damage the converter. The 45W converter has some kind of overcurrent protection and shuts down for loads drawing more than approximately 105% of rated current. 49 4. Results 4.2 Partial Loading In this section the efficiency of the flyback, forward and LLC converter operating at partial loading are modelled. The efficiency curves for each converter, with and without hysteresis losses are plotted together in Fig. 4.2 and Fig. 4.3 respectively. Because the converter models lack a controller, the duty cycle and switching fre- quency is controlled manually. This process is iterative and performed until the output voltage Vo = 5V ± 0.1V . 10 20 30 40 50 60 70 80 90 100 Loading [%] 86 88 90 92 94 96 98 100 E ff ic ie n c y [ % ] Forward SR Transformer 1 Forward Diode Transformer 1 Flyback SR Flyback Diode LLC Diode LLC SR Forward Diode Transformer 2 Forward SR Transformer 2 Figure 4.2: Topologies experiencing partial loading without hysteresis losses. 10 20 30 40 50 60 70 80 90 100 Loading [%] 50 55 60 65 70 75 80 85 90 95 E ff ic ie n c y [ % ] Forward SR Transformer 1 Forward Diode Transformer 1 Flyback SR Flyback Diode LLC Diode LLC SR Forward Diode Transformer 2 Forward SR Transformer 2 Figure 4.3: Topologies experiencing partial loading with hysteresis losses. 50 4. Results The result show that the LLC with SR, is operating with the highest overall efficiency with and without hysteresis losses. All curves follow a similar behaviour except the one for flyback with diode rectifier. For low loads it has a slight oscillation and less of an efficiency reduction. In Fig. 4.2, without hysteresis loss, the flyback and the two forward converters with diode rectifiers have roughly the same efficiency and with SR the flyback becomes the most efficient. With the hysteresis loss however, the forward converter with transformer 2 becomes more efficient than the other forward and flyback converters. This shows the advantage of the forward converter being able to have a greater magnetizing inductance than the flyback. The power dissipation throughout partial loading for the forward converter with diode rectifier for transformer design 1 can be seen in Fig. 4.4. It shows the danger of operating above rated load as although the efficiency is increasing the total losses are also increasing non linearly. 10 20 30 40 50 60 70 80 90 100 Loading[%] 50 55 60 65 70 75 80 85 E ff ic ie n c y [% ] 1 1.5 2 2.5 3 3.5 P o w e r L o s s [W ] Figure 4.4: Efficiency and power loss comparison of Forward converter with diode rectifier and transformer design 1 The power dissipation caused by each component during partial loading in the fly- back converter is presented in Fig. 4.5. The results show that the components that has the largest contribution to the converter efficiency are the diode and trans- former. Thus, by reducing the losses in the diode by investing in a diode with lower forward voltage drop and ron or in SR the efficiency can be increased significantly. The transformer loss is almost constant from 60− 100% due to the flyback entering CCM and thus the magnetizing current remain constant. The primary switch losses increases only slightly as the loading increases, which suggests that the major cause of losses are switching loss due to the low currents. The results also shows how the percentage of the loss decreases significantly as the converter enters CCM between 60-100% loading. 51 4. Results 10% 40% 60% 100% Loading 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 P o w e r [W ] 15.5 16 16.5 17 17.5 18 18.5 L o s s [ % ] Cout D1 Primary Switch Transformer Total Losses Figure 4.5: Component losses during partial loading of Flyback Converter The power dissipation caused by the components during partial loading in the for- ward converter with transformer design 2 is presented in Fig. 4.6. Here, the power loss in the two diodes together with output inductor increases at 60% loading while the transformer remains at a fairly stable consumption due to its high magnetizing inductance. At 10% loading the power consumption caused by the primary switch and diodes are mainly caused by the switching losses and the high forward voltage drop due to the low current. The results also indicates that even though the power consumption of the components increases towards rated power, the percentage of the total loss decreases. 10% 40% 60% 100% Loading 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 P o w e r [W ] 12 14 16 18 20 22 24 L o s s [ % ] Lout Cout D1 D2 D3 Primary Switch Transformer Total Loss Figure 4.6: Component losses during partial loading of Forward converter with Transformer 2 52 4. Results 4.3 Component Losses The component losses for converters with diode rectifiers is presented graphically in Fig. 4.7 and numerically in Table 4.1. The converters are tested at rated power and their respective component losses are measured to establish their major power consumers. In the flyback converter the diodes and transformer are the major power consumers with significantly higher output capacitor losses compared to the other converters. The difference between the two flyback topologies is the implementation of the leakage inductance, causing the total circuit losses to increase with 0.3W , which is an increase of 11.3%, due to the added RCD snubber. The two forward converters differ in transformer design, to be able to see the signif- icance of the choice of low vs high magnetizing inductance. Figure 4.7 shows that the implementation of the second transformer design reduces the overall power loss by 707.5mW , which is a reduction of 23.2%, mostly due to lower hysteresis losses. Excluding the transformer losses, the largest losses are caused by the two diodes and output inductor. The Half-Bridge LLC operates with the best overall efficiency. The contribution of the primary switch is reduced compared to the other topologies due to its ZVS operation but share the similarities of high losses caused by the diodes. 1 2 3 4 5 Converter Topologies 0 0.5 1 1.5 2 2.5 3 3.5 P o w e r L o s s [ w ] Lout Cout Resonant Tank D1 D2 D3 Primary Switch Transformer Snubber Figure 4.7: Graphical presentation of the component losses in; (1) Flyback Diode, (2) Flyback Diode Snubber, (3) Forward Diode Transformer 1, (4) Forward Diode Transformer 2 and (5) Half-bridge Diode LLC. 53 4. Results Table 4.1: Component losses of the diode implemented topologies Component Flyback Diode [W] Flyback Diode RCD Snubber [W] Forward Diode Transformer 1 [W] Forward Diode Transformer 2 [W] LLC Half-Bridge Diode [W] LOut 429.59m 432.10m COut 173.84m 175.56m 413µ 412µ 50.65m Resonant Tank 31.85m Diode 1 (D1) 1.6086 1.6015 662.77m 666.06m 791.08m Diode 2 (D2) 730.42m 734m 790.59m Diode 3 (D3) 20.20m 5.65m Primary Switch 133.72m 102.15m 157.27m 142.34m 57.95m RCD Snubber 324.58m Transformer 805.13m 823.86m 1.04820 360.77m 124.15m Total 2.72129 3.02765 3.048863 2.341332 1.84627 The component power loss contribution of the converters with SR is presented graph- ically in Fig. 4.8 and numerically in Table 4.2. The converters are tested at rated power and their respective component losses are measured to establish their major power consumers. The reduction in power loss caused by SR implementation resulted in significantly higher efficiency for all the converters. The SR and transformer are the leading cause of power loss for both the flyback converter with and without snubber. The SR losses for the two forward converts are relatively low but the loss caused by the output inductor becomes more noticeable. In the half bridge LLC converter with SR the transformer losses are still dominant, although it still has the lowest losses compared to the other topologies. Figure 4.8: Graphical presentation of the component losses in; (1) Flyback SR, (2) Flyback SR Snubber, (3) Forward SR Transformer 1, (4) Forward SR Transformer 2 and (5) Half-bridge SR LLC. The transparent upper bar signifies the loss difference between diode and SR topologies. 54 4. Results Table 4.2: Component losses of the SR implemented topologies Component Flyback SR [W] Flyback Diode RCD Snubber [W] Forward SR Transformer 1 [W] Forward SR Transformer 2 [W] LLC Half-Bridge SR [W] LOut 427.25m 427.21m COut 161.71m 164.99m 403µ 401µ 40.38m Resonant Tank 26.83m SR 1 430.5m 410.07m 109.94m 103.45m 108.34m SR 2 131.75m 129.78m 108.58m Diode 3 (D3) 18.52m 5.65m Primary Switch 138.71m 92.84m 159.7m 153.08m 35.82m RCD Snubber 321.66m Transformer 726.78m 727.77m 886.96m 110.80m 114.061m Total 1.4577 1.71733m 1.734523 930.371m 434.011m 4.4 Modeled Converter Current and Voltage Be- haviour 4.4.1 Effects of Leakage Inductance The voltage across the primary switch for the flyback converter with and without leakage inductance can be seen in Fig. 4.9 and Fig. 4.10. In Fig. 4.9 the first oscillation reaches 800V , the breakdown voltage of the switch, then the voltager ripple slowly dies out. For the case with a RCD snubber in Fig. 4.10, the RCD snubber limits the peak voltage ripple to 732V . 9.15 9.16 9.17 9.18 9.19 9.2 Time[s] 10 -4 0 100 200 300 400 500 600 700 800 V o lt a g e [V ] Voltage with leakage inductance Voltage without leakage inductance Figure 4.9: Voltage across primary switch, with leakage inductance(blue) and without leakage inductance(red). The leakage inductance contributes to a voltage ripple which reaches 800V and thus causes a breakdown of the switch. 55 4. Results 7.45 7.46 7.47 7.48 7.49 7.5 Time[s] 10 -4 0 100 200 300 400 500 600 700 800 V o lt a g e [V ] Voltage with leakage inductance Voltage without leakage inductance Figure 4.10: Voltage across primary switch, with leakage inductance and RCD snubber(blue) and without leakage inductance(red). With a RCD snubber the highest voltage ripple reaches 732V , which is within safe operation for the switch. 4.4.2 Impact of TransformerWindings in Forward Converter The primary and demagnetization current in the diode implemented forward con- verter are presented in Fig. 4.11. Where Fig. 4.11 (a) and (b) are the current behaviour with transformer design 1 and 2 respectively. The implementation of transformer 2, caused the magnetizing current to drop significantly due to its high magnetizing inductance. The resulting winding and hysteresis losses caused by the two transformer implementations are presented in Table 4.3. The implementation of transformer 2 reduced the hysteresis losses by 75.4% but increased the winding loss by 61.8%. The hysteresis losses in the forward converter with transformer design 1 comprised 92.84% of its total losses, while for transformer design 2 its 50.70%. 56 4. Results 6.67 6.671 6.672 6.673 6.674 6.675 6.676 6.677 6.678 6.679 6.68 Time [ms] 0 0.05 0.1 0.15 0.2 C u rr e n t [A ] Primary Current Demagnetization Current (a) Forward converter with diode rectifier and transformer design 1 4.67 4.672 4.674 4.676 4.678 4.68 4.682 Time [ms] -0.02 0 0.02 0.04 0.06 0.08 0.1 0.12 C u rr e n t [A ] Primary Current Demagnetization Current (b) Forward converter with diode rectifier and transformer design 2 Figure 4.11: The forward converter primary and demagnetizing current through the transformer. Figure (a) has a peak demagnetizing current of 104.43mA. Figure (b) has a peak demagnetizing current of 33.269mA Table 4.3: The winding and hysteresis losses for the two transformer designs im- plemented in the forward diode converter. Transformer components Case 1 Case 2 Winding Losses [W] 75m 121.37m Hysteresis losses [W] 973.2m 239.4m Total losses [W] 1.0482 360.77m 57 4. Results 4.5 Economical Impact of Increasing Converter Efficiency Because a more efficient DC-DC converter has lower energy losses, the end user is able to reduce the energy usage. The converter will also have less of a negative impact on the environment during its operation. To evaluate the economical benefits of upgrading from diode rectification to synchronous rectification a present value analysis is performed using (2.57). The converter used in this evaluation is the LLC half bridge converter which had a reduction in losses of 1.41W 1 with SR at rated operation. The future electricity price is assumed to be constant and set to the average price per kWh in the second half of 2018. This price is 1.53kr/kWh for a normal household with a yearly consumption of ≥ 15000kWh and includes various power grid fees, value-added tax and electricity tax [29]. The discount rate is taken as 5% for three different cases to use as a comparison. One case is for a mobile phone charger which will be in use 2 hours per day, a second case is for a LED driver that is in use 24 hours per day and a third case is for a LED driver used 10 hours per day. For the third case with the 10 hour LED driver, the discount rate is varied p = 5%± 2.5% to compare the effects of different discount rates. The present value for implementing SR in the phone charger and LED drivers can be seen in Fig. 4.12 for different lifetimes. The effect of diminishing return due to the discount rate can be seen as the curves starts tapering off as time goes on. 0 2 4 6 8 10 12 14 16 18 20 Time [year] 0 50 100 150 200 250 C o s t o f S R [ k r] 18.03kr 1.50kr 81.95kr 7.58kr 146.20kr 12.63kr 235.90kr 19.66kr 122.90kr 98.29kr 80.40kr 10 hours per day(p=5%) 10 hours per day(p=2.5%) 10 hours per day(p=7.5%) 24 hours per day(p=5%) 2 hours per day(p=5%) Figure 4.12: Present value analysis for SR implementation in LLC converter. For use 10h/day p = 5%± 2.5%(red), 24h/day p = 5%(blue) and 2h/day p = 5%(brown). Assuming a normal life time for a phone charger to be five years, highest investment to ensure positive revenue is given to be 7.58kr while for the LED drive is 81.95kr. 1Obtained at rated power of 15W 58 4. Results Thus, there might not be an economic drive for SR in a phone charger, but investing SR into LED driver may lead to a more profitable solution. The effect of varying the discount rate can be seen for the case which is on 10 hours, the red lines starts out similar and as time goes on their inclination differs more and more. Comparing with the converter with p = 5% after 20 years, with p = 2.5% the present value is 25.0% higher and with p = 7.5% the present value is 18.2% lower. This goes to show the importance of estimating the discount rate. Undervaluing the discount rate may lead to overpaying for the components and overvaluing it may lead to missing out on an investment opportunity. For devices with long planned lifetime, efficiency improvements also starts to become more impactful. This goes to show that the application is very important when it comes to increasing its efficiency. This was for a 15W converter and as the power levels increases so does the losses, thus there will be an increased present value from reducing losses at higher power levels. 59 4. Results 60 5 Discussion/Conclusion The results show that the diodes are one of the major causes of power loss and that implementation of SR reduced the total losses significantly. All of the topologies are positively impacted by SR, but its significance is most noticeable in the half-bridge LLC. The effect of tuning the transformer design can be seen in the comparison between the two forward converters. In the first forward design, the core losses where dominant while for the second converter the core losses got reduced by 66%. This shows that the transformer design can be refined to increase transformer efficiency. There are however precautions that must be made when increasing the number of turns, as the leakage inductance increases quadratically with the number of turns. Other possibilities of reducing the core losses could be to re-design the transformer with a smaller core or different ferrite material while still maintaining the same number of turns. The half-bridge LLC SR proved to be the topology operating with the highest con- sistent efficiency over the operating region. Its low magnetizing current together with the natural ZVS of the primary switch reduces core and switching losses. After implementing the LLC converter with diode rectifier into LTspice, circuit nonideal- ities cause the output voltage to fall below 5V at unity resonance tank gain. The optimal operating point is for unity resonance tank gain, where the switching fre- quency is fr1 = 100kHz and thus the load was fitted to give 15W output power for an output voltage below 5V . This may result in increased diode losses and might be why the LLC converter shows the best efficiency improvement with SR. The flyback with diode rectifier deviated from the pattern of reduced efficiency below 20%, this may be due to it entering DCM at about 50% loading. The voltage gain changes for DCM as transfer function become dependent on load resistance, magnetizing inductance and switching freq