WBG Electronics for Energy-Efficient Power Electronic Applications Master Thesis in Electric Power Engineering LUCIA EL-ACHKAR MATILDA HILDESSON Department of Energy and Environment CHALMERS UNIVERSITY OF TECHNOLOGY Gothenburg, Sweden 2017 Master Thesis 2017-06 WBG Electronics for Energy-Efficient Power Electronic Applications LUCIA EL -ACHKAR MATILDA HILDESSON Department of Energy and Environment Division of Electric Power Engineering Chalmers University of Technology Gothenburg, Sweden 2017 WBG Electronics for Energy-Efficient Power Electronic Applications LUCIA EL -ACHKAR MATILDA HILDESSON © LUCIA EL -ACHKAR MATILDA HILDESSON, 2017 Supervisor: Carl Petersson, Qrtech AB Examiner: Torbjörn Thiringer, Energy and Environment Master Thesis 2017-06 Department Energy and Environment Division of Electric Power Engineering Chalmers University of Technology SE-412 96 Gothenburg Telephone: +46 31 772 1000 Cover: WBG Electronics for Energy-Efficient Power Electronic Applications Typeset in LATEX Printed by Chalmers Reproservice Gothenburg, Sweden 2017 iv WBG Electronics for Energy-Efficient Power Electronic Applications LUCIA EL -ACHKAR MATILDA HILDESSON Department of Energy and Environment Division of Electric Power Engineering Chalmers University of Technology Abstract An investigation between Wide Band Gap (WBG) transistors and silicon (Si) tran- sistors were performed to investigate characteristics, materials, and best practice usage of different WBG transistors. The investigated WBG transistors were silicon carbide (SiC) and GaN transistors, but only GaN transistors were used as WBG transistors since the SiC transistors today are more applicable for high voltage ap- plications. Two small compact dc/dc converters, with Si and gallium nitride (GaN) transistors respectively, were designed and constructed. The main purpose of the thesis was to investigate if WBG transistors had potential for future use in power electronic applications. The benefit of WBG transistors is that they can operate at higher switching frequencies and with lower switching losses compared to Si transis- tors. From the investigation of the WBG transistor it could be concluded that GaN transistors have a big potential. This is due to that GaN transistors can operate at higher switching frequencies and have smaller designs for almost the same efficiency as Si transistors. Keywords: WBG transistors, dc/dc converter, integrated converter, gate driver, converter layout v Acknowledgements We want to thank QRTECH as a company for having us there and for provid- ing financial aid and support in our project. We would also like thank everyone at QRTECH for their invaluable guidance, enthusiastic encouragement and for so generously giving their time when needed. We would like to express most of our grat- itude and appreciation to our advisor at QRTECH, Carl Peterson, for all the help from guidance to troubleshooting, but also for giving us constructive suggestions and useful critique during the project. Lastly, we want to express our appreciation to our examiner, Torbjörn Thiringer, for his help and constructive suggestions. Lucia El-Achkar and Matilda Hildesson Gothenburg, Sweden, June, 2017 Contents 1 Introduction 1 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Aim . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Task . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.4 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4.1 Ethics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4.2 Sustainable Development . . . . . . . . . . . . . . . . . . . . . 5 2 Theory 7 2.1 dc/dc Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Parameter Calculations . . . . . . . . . . . . . . . . . . . . . . 8 2.2 MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.1 Si . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.3.2 SiC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.3.3 GaN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.4 WBG Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5 Parasitic Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.5.1 Parasitic Elements Calculations . . . . . . . . . . . . . . . . . 15 2.6 Thermal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.6.1 Loss Calculations . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.6.2 Thermal Model . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.7 EMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3 Procedure 25 3.1 Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.2 Case set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4 Simulations 27 4.1 Circuit Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.1.1 Simulation of the Simplified Model with two Switches . . . . . 30 4.2 Effect of Parasitic Elements . . . . . . . . . . . . . . . . . . . . . . . 35 5 Design 37 5.1 Selection of Components . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.1 Selection of the Si converter components . . . . . . . . . . . . 38 5.1.2 Selection of the GaN converter components . . . . . . . . . . . 39 vii Contents 5.2 dc/dc Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 5.2.1 Schematic of the two dc/dc Converters . . . . . . . . . . . . . 42 6 Analysis 49 6.1 Component and Parasitic Element Classification . . . . . . . . . . . . 49 6.2 Parasitic Element Model . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.2.1 Simulated Parasitic Element Model . . . . . . . . . . . . . . . 51 6.2.2 Performance of the PCB . . . . . . . . . . . . . . . . . . . . . 58 6.3 Thermal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 6.3.1 Temperature measurement on the PCB . . . . . . . . . . . . . 64 6.3.2 Losses on the PCB . . . . . . . . . . . . . . . . . . . . . . . . 65 6.3.3 Losses from the Simulations . . . . . . . . . . . . . . . . . . . 67 6.4 Interference of the PCB . . . . . . . . . . . . . . . . . . . . . . . . . 68 6.4.1 Interference before the upper MOSFET . . . . . . . . . . . . . 69 6.4.2 Interference after the lower MOSFET . . . . . . . . . . . . . . 75 6.5 Comparison between the Simulation Models and the PCB . . . . . . 82 7 Conclusion 85 7.1 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Bibliography 87 A Appendix: Datasheet of the IC for the Gate Driver of the Si Tran- sistors I B Appendix: Datasheet of the IC for the Gate Driver of the GaN Transistors V C Appendix: Datasheet of the Si Transistor XXV D Appendix: Datasheet of the GaN Transistor XLIII E Appendix: Datasheet of the Inductor for Si LV F Appendix: Datasheet of the Capacitor for Si LVII G Appendix: Datasheet of the Inductor for GaN LXIII H Appendix: Datasheet of the Capacitor for GaN LXXI viii 1 Introduction 1.1 Background The increase of CO2 emissions have led to climate changes such as melting glaciers, air pollution etc. These climate changes are a cause of growing concern, and therefore some changes need to be made in order to decrease the CO2 emissions. There are many ways to decrease CO2 emissions, one of these is to use electrified vehicles rather than Internal Combustion Engine (ICE) vehicles [1]. Electric vehicles can be divided into two categories: Electric Vehicles (EV) and Hybrid Electric Vehicles (HEV). The latter category can be further divided into four categories: full hybrid, mild hybrid, micro hybrid, and plug-in hybrid. An electric vehicle only contains an Electric Machine (EM), while a hybrid contains an ICE and an EM [2, 3]. The main components in a power train for electrified vehicles are ICE, battery, power electronics such as dc/dc converters, EM and inverter [4]. The demand for more compact and smaller electric devices increases in all technical areas. In the vehicle industry, the need for smaller, more efficient electric devices increases as the need for more electrified vehicles increases. If the components in the vehicle could be more compact and efficient, it would lead to less weight of the car, which in turn would lead to less energy for propulsion. If the vehicle need less energy for propulsion, the cost to operate an electric or hybrid vehicle will decrease. With more compact components in electric vehicles the use of materials for the manufacturing could reduce, and this could lead to a lower manufacturing cost. The lower cost of both manufacturing and driving an electric or hybrid vehicle could interest more people to switch from ICE vehicles to more sustainable options. If dc/dc converters could become more efficient and more compact, it would benefit many technical areas, for example the electric and hybrid vehicle industry. That is why it is important to investigate other types of semiconductors for converters. Development of Si-based components have slowed, and today most improvements are only minor. Significant improvements on the already well-established, and well- researched, Si technology is unlikely to be made. In order to achieve significant improvements, other materials besides silicon can be used which have the same characteristics or better. One attractive alternative is the semiconductors with wider band gap. However, these semiconductors still need to be tested and evaluated. The 1 1. Introduction benefits of WBG components compared to Si are higher efficiency and breakdown voltages, lower switching losses, higher switching frequency, and higher temperatures [5, 6, 7]. Companies today strive to have more compact devices with higher efficiency, which reduces cost of materials and contributes to less losses in the application etc. One way to achieve this is by using semiconductors with a WBG. Using WBG semiconductors allow devices to operate at higher switching frequencies. With higher switching frequencies, lower inductance and capacitance values can be achieved, which result in smaller components and more compact devices. The most common WBG materials today are silicon carbide (SiC) and gallium nitride (GaN) [8]. 1.2 Aim The aim of this thesis is to investigate characteristics, materials, and best practice usage of different WBG transistors. Two small compact dc/dc converters will also be designed and constructed. 1.3 Task The main task of this thesis was to design dc/dc converters with WBG transistors in order to decrease the size of the converters. The main challenges of the project were: constructing the converter in such a way that it utilized the potential of the new semiconductors, measurements of fast current/voltage changes, simulation of semiconductors and parasitic elements, and to compare the different types of semiconductors and evaluate the pros and cons. In order to achieve the aim of the thesis, three tasks were completed. 1. Effect and Selection of Semiconductor Materials The semiconductor materials that were studied in this master thesis were Si, SiC and GaN. The effect of these materials used in a dc/dc converter were simulated and evaluated in order to choose the most suitable semiconductor material for the switch in the dc/dc converter. The losses, efficiency, and ripple in the dc/dc converter was studied in LTSpice and Matlab to determine the effects of the semiconductor material. 2. Effect of Parasitic Elements All the electric components contain one or several parasitic elements. Depend- ing on the component, its specific parasitic element contributes to interference in the circuit. Not all the parasitic elements in the circuit affect the overall performance of the circuit; some of them can be neglected since they are small compared to the component’s overall effect on the circuit. The parasitic ele- 2 1. Introduction ments in a circuit are parasitic resistance, parasitic capacitance and parasitic inductance [9]. A study of the effect of the parasitic elements in the circuit were performed and analyzed to investigate the performance of the converters. 3. Design, Test and Evaluation of dc/dc Converter The impact of the WBG transistors in the converters were studied and sim- ulated. A comparison between the different transistor materials in regards to the requirements of the dc/dc converters were performed. The values of the inductor and capacitor used in the converters were calculated, and the con- verters were constructed and tested. Finally, with the results of the testing, the performance of the different transistor materials were compared in regards to efficiency, size, issues with interference etc. 1.4 Scope The project describes WBG electronics for energy-efficient power electronic appli- cations. The main focus for the project was to design a compact dc/dc converter, to investigate the characteristics of WBG transistors, and to find the best suitable material for the selected WBG transistor. Due to the time frame the focus was to design one dc/dc converter, however there were time to design two dc/dc convert- ers. The requirements for the dc/dc converter are that the input voltage should be around 40 V, the input power should be between 100 W and 500 W and the output current should be between 9.6 A and 45 A in the converter. The semiconductor materials that were investigated and tested for the WBG transistor were Si, SiC and GaN. Study of the EMC performance of the converter to investigate whether the dc/dc converter is exposed to interference was not carried out. Only a literature study regarding EMC performance was done. The project took into consideration sustainability and ethics of constructing the dc/dc converters. The sustainability aspect of constructing the dc/dc converters consist of investigating how the materials and the different components will affect the environment. The investigation took into account both the construction of the individual components, and the assembly of the converters. The ethical aspect of the dc/dc converters and the different semiconductor materials were handled by investigating and comparing the prototype constructions, and the operation to the IEEE code of ethics. Limitations: In the thesis, a regulator that automatically changes the duty cycle in order to get a voltage output between 9.6 V and 24 V was not considered, as it was too complex to cover sufficiently well in the scope of this master thesis. The duty cycle is changed manually in order to get an output voltage of 9.6 V. A gate driver for the gate of the transistors was not designed. Instead, a suitable gate driver was selected and purchased. Since there are several different molecule structures that are all referred 3 1. Introduction to as SiC, which have differently sized band gaps, only the three most common structures of SiC (3C-SiC, 4H-SiC, and 6H-SiC) were investigated. 1.4.1 Ethics The ethic aspect of the dc/dc converter and the three different semiconductor mate- rials are a comparison of the prototype constructions. Three relevant points to this project from the IEEE code of ethics are used and modified to fit our project. 1. To be honest and realistic in stating claims or estimations based on the avail- able data from the simulations and the prototypes Before any claims about the designed converter could be made, it was essential to do some research in order to have facts that can back up the claims. To be honest about the results of the converters, to be clear on how it worked and which type of problems that was encountered were important. Because if the problems of the converters were not highlighted and only their benefits, it could lead to technical problems when they are being used. For instance if the converters have unmentioned problems and then sold for example to the car industry and then start to malfunction, it could in worst case scenario lead to a car crash with people getting injured. Therefore the importance of being honest and clear about the results of the project. It is also good to compare the simulation and the practical results as a way to validate the practical results. In order to claim that the prototypes have a good design, the simulation values were verified with analytical expressions. The components in the designs were selected in order to reduce the ripples, losses, and costs. 2. Safety measures in the converter designs Before the final prototypes were finished it was necessary to test and evalu- ate if the dc/dc converters were safe to use. The dc/dc converters were not considered every safety procedures such as to protect the human from exam- ple electric shock. The focus of the designs was to have a working converter with high efficiency and as compact as possible. It was not taken into account for example thermal protection and short-circuit protection. Those protection will be a subject for research in a future project. 3. To improve the understanding of technology for the dc/dc converters and the different semiconductor materials Before designing dc/dc converters, some research regarding the technology and the semiconductor materials needed to be done. After the basic research, the converters were being designed and tested. This was to test and observe how the different semiconductor materials behaved for different switching frequen- cies, change in input voltages, adding interference in the circuit etc. In this way a more understanding of the converters was achieved. Then it was easier 4 1. Introduction to know what to change in the converters in order to improve them. If an understanding of the technology on how dc/dc converters and how the differ- ent semiconductor material works are lacking, then a proper design can not be designed which can lead to several technical problems when operating the converters. 1.4.2 Sustainable Development In today’s society, the need of making changes for the climate change and resource depletion is high. One of the solution is electrified vehicles since the emission of carbon dioxide can be decreased which in turn will reduce the cost of fuel. The question is, are the electrification of the electric vehicles a sustainable option? In order for the electric vehicles to be a sustainable option is if the electrification comes from renewable sources. If the electricity does not comes from renewable sources, but from fossile fuels then the problem is still an issue even though the emission of carbon dioxide is reduced. In order to generate electromobility as a sustainable option, then the electric vehicles need to be charged from renewable sources. For this to be possible, the renewable sources need to be incorporated which leads to some modifications to the existing power grids need to be done [10, 11]. To get better and more efficient electrified vehicles all the parts in the power train need to be more efficient and if possible more compact to get lighter vehicles and/or more spaces for the passengers. The designed dc/dc converters in this thesis could be a suitable part of a power train in an electrified vehicle. However, in order to create more environmentally friendly transportation it is important to know that the vehicle itself is produced as sustainable as possible and not just that their propulsion is sustainable. Therefore, the sustainability aspect of the dc/dc converters needs to be investigated such as how the semiconductor materials and the different components affects the environment. The availability of the raw materials of the three semiconductor materials is high and those are scattered all over the world. Si is the eight most common element in the universe and it could be found in the crust of the earth and in the hydrosphere [12]. SiC are composed of silicon and carbon atoms that form crystal structures. SiC are created in electric furnaces at a temperature around 2000-2 500°C through a reduction of quartz sand with excess coke [13]. GaN are composed of gallium and nitrogen atoms. Gallium is found in the crust of the earth and is spread out there[14]. Nitrogen is the sixth most common element in the universe and it can be found in atmosphere, hydrosphere, and in the crust of the earth [15]. The environmental impact of the raw materials of the transistors themself are not hazardous, but when combining with other elements to create new materials such as SiC and GaN it could cause some environmental impacts and also the process of extracting the raw materials could impact the environment. The production and usage of chemicals stand for up to approximately ten percent of the emission of the 5 1. Introduction green house gases. The main emission is carbon dioxide from the production of the chemicals. The need of new energy technologies are created due to today’s climate problems and the increase of this new theologies can increase the usage and spread of toxic chemicals. However, by trying to fix one problem another problem can occur. Gallium is a component part of GaN that is used for the new transistor technology. Gallium itself is seen as a toxic element and is extracted in a harmful way for the environment [16]. Silicon affects the environment mostly when it is extracted from mining. Mining affects the environment with dust, large noises and emission both to the air and closed waters. The people working with silicon as a raw material both to extract it from the earth crust and to cutting the stones, are at risk of getting the lung disease Silicosis due to that they are exposed to silica dust [17, 18]. In order to make as sustainable converters as possible it is important that all the components are chosen carefully and not only their performance is checked, but also what type of material they are manufactured from. In February 2003 the European Commission legalized the RoHS Directive. The RoHS Directive stands for Restriction of Hazardous Substances in electronic and electrical equipments, which means that all products in EU need to pass the RoHS compliance. The Directive also requires that heavy metals such as lead or mercury for instance should be changed to an environmentally friendlier alternative instead [19]. When the dc/dc converters are used, their operation could be considered to be sustainable. However, the production of the electricity for the converters need to be considered in order to see if the operation is sustainable. If the electricity that is used to drive the voltage supplier of the converter is produced in a coal mine, then it will not be a sustainable operation. 6 2 Theory In this chapter the theory about dc/dc converter, MOSFET, Semiconductors, WBG materials, parasitic elements, thermal analysis and EMC is presented. 2.1 dc/dc Converter A dc/dc converter is as the name implies, a device that converts from one dc voltage level to another. It is mainly used within the power electronic area, such as dc motor drive applications. The common dc/dc converters are: buck (step-down) converter, boost (step-up) converter, buck-boost (step-down/step-up) converter, flyback con- verter, forward converter, and full-bridge converter. The focus in this thesis is the buck converter [20, 21]. The main purpose of a buck converter is to convert from a higher input dc voltage to a lower average output voltage. The purpose of the diode is to prevent the switch from absorbing the inductive energy created by the inductance and the stray inductance in the converter. Otherwise, the switch might break. After the switch and the diode, the converter is followed by a low-pass filter that contains an inductor and a capacitor in order to dampen the output voltage fluctuations. The value of the inductor and the capacitor has to be sufficiently large in order to have sufficiently constant inductor current and output voltage respectively. The buck converter is using pulse width modulation (PWM) for its operation. The main concept of PWM encompasses that a pulse voltage creates an average voltage. The average voltage depends of the duty cycle, in other words the ratio between the high and low time of the pulsed voltage. The output voltage of the buck converter can be controlled by varying the duty cycle of the converter [20, 21]. The size of the low-pass filter of the buck converter depends on the switching fre- quency. The filter size can be lowered when using a higher switching frequency. Besides the filter size, the switching frequency also depends on what type of semi- conductor device is used as switch. The switching frequency affects the converter size, weight, efficiency and cost. The usual range of the switching frequency is usu- ally above 100 kHz [20, 21]. The ideal circuit of the buck converter with MOSFET 7 2. Theory as a switch and a gate driver for the MOSFET is shown in Figure 2.1. Figure 2.1: An ideal circuit of a buck converter with MOSFET as a switch 2.1.1 Parameter Calculations The duty cycle for a buck converter can be expressed according to D = Uo Uin , (2.1) where Uin is the input voltage and Uo is the output voltage [20]. Using Ohm’s law, the load can be calculated according to Rload = Uo Io , (2.2) where Io is the output current. The voltage across the inductor can be defined according to uL = L diL dt , (2.3) where L is the inductance and diL dt is the rate of change of the current flowing through the inductor [20]. The value of the inductance can be calculated with the help of the on time during one switching period. This inductance value, combined with (2.3) can be used to transform the equation for the inductance to L = uLton ∆iL , (2.4) 8 2. Theory where ton is the on time [20]. The voltage ripple across the capacitor can be calcu- lated according to ∆uC = Q C , (2.5) where Q is the charge of the capacitor seen in Figure 2.2 and gives the expression according to Q = 0.5 ∆iL 2 Tsw 2 , (2.6) where Tsw is the switching period [20]. Inserting (2.6) in (2.5) gives the value of the capacitance according to C = ∆iLTsw 8∆uC , (2.7) Figure 2.2: The current through the capacitor 2.2 MOSFET The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has been avail- able since early 1980s and is one of the most common transistors for switching electric signals. MOSFETs are appropriate for applications with high switching speed and are also used for both analog and digital circuits. MOSFET can be divided into two categories: N-type and P-type. This is because the polarity of the channels are different between the two types. The MOSFET has many advantages compared with the BJT and the thyristor and the advantages are high input resistance, low 9 2. Theory drive power, and high switching speeds. Because of the higher switching speeds it performs well in high-frequency applications [20]. MOSFETs have three terminals: gate (G), source (S) and drain (D). The gate ter- minal is the input to the MOSFET, in which the current flows between the output terminals, source and drain. A MOSFET can be modeled from its equivalent circuits and are shown in Figure 2.3 and 2.4. The equivalent circuits give an understanding of the switching characteristics, the turn-off and turn-on characteristics, which are important to understand in order to design an appropriate gate drive for the MOS- FET. In the equivalent circuits, the capacitance Cds is not included since it does not psychically affect the waveforms or the switching characteristics. However, if a snubber was to be designed for the MOSFET it needs to be considered [20]. Figure 2.3 represents the MOSFET in the ohmic region and it enters the ohmic region when VGS » VGS(th) . In the ohmic region the on-state resistance, RDS(on) represents the ohmic losses that occur from the drain drift region. Figure 2.4 represents when the MOSFET is in the cutoff and active regions, where it contains a current source between drain and source. The current source is present because the drain current ID is constant in the MOSFET’s active region, and does not depend on VDS. The current source is equal to gm(VGS - VGS(th)) in the active region and equal to zero when VGS < VGS(th) . Figure 2.3: The equivalent cir- cuit for the MOSFET in the ohmic region Figure 2.4: The equivalent cir- cuit for the MOSFET in the cut- off and active regions The internal capacitance value of the MOSFET model can be calculated from the values in the datasheet of the MOSFET, by using (2.8), (2.9) and (2.10) Cgd = Crr, (2.8) 10 2. Theory where Cgd is the gate-to-drain capacitance and Crss is the reverse transfer capaci- tance [22]. The expression of Cgs can be determined as Cgs = Ciss − Crss, (2.9) where Cgs is the gate-to-source capacitance and Ciss is the input capacitance [22]. The expression of Cds can be determined as Cds = Coss − Crss, (2.10) where Cds is the drain-to-source capacitance and Coss is the output capacitance [22]. 2.3 Semiconductors Semiconductors are materials that have a conductivity that lies in the interval be- tween metals and insulators. Semiconductors can be divided into two types: single- element semiconductors and compound semiconductors. Single-element semicon- ductors are in group IV in the periodic table and examples of these are Si and SiC. The compound semiconductors are suitable for applications that involve light or for special electronic circuit applications. Compound semiconductors consist of combined elements from groups III and V or groups II and VI in the periodic table [23, 24]. The free-carrier density in a semiconductor can be changed due to an applied electric field. Where the electrical current in the material is a result of free charge carriers (often electrons) and an applied electric field. In order for the current to flow through the material, the free carriers need to be able to move in response to the electric field. The amount of free carriers varies depending on the material and if it is a metal, insulator or semiconductor. Semiconductors are seen as unique and useful materials for electrical applications because of their capacity to manipulate the free-carrier density [20]. Traditional semiconductor materials such as Si are limited in their operating temper- ature due to a low-energy barrier. The leakage current in Si devices increases when the temperature increases. Research in semiconductor materials has lead to progress in device design, fabrication and in semiconductor materials technology. These ad- vancements are providing new solutions to the limitations of the traditional semi- conductors. This has resulted in a development for semiconductor devices suitable for high power, high frequency and high temperature. Notable examples of these semiconductor materials are SiC and GaN, where the expectation of the devices are high reliability, smaller size and low cost [25]. 11 2. Theory 2.3.1 Si Si is the second-most abundant element on earth and in the hydrosphere, it is also the eighth most common element in the universe [12]. The first commercially available silicon transistor was produced in 1954 by Texas Instruments and it came quickly to dominate the new market. The silicon transistor would replace the vacuum tube in the power electronic area and due to the silicon transistor the technology developed and became more efficient with smaller sizes. Silicon was hard to work with because of its high melting temperature and reactivity compared to germanium. However, as a transistor material it provides major possibilities such as better performance in switching applications [26]. Gordon E. Moore, the research director at Fairchild Semiconductor Corporation made a prediction after observations and estimations in 1965 that transistors per- formance would double with a lowering cost every 18 months. This came to be called Moore’s law. The reason for this exponential growth has turned out to be steadily shrinking size of transistors compared to its predecessor the vacuum tube [26]. New applications were made possible by using silicon, due to its many advan- tages relative its predecessor. Silicon was more reliable, easier to use and cost less [27]. Silicon transistors are the most common transistor today but the development of Si transistors has started to stagnate [26]. 2.3.2 SiC SiC is a semiconductor material that is composed of Si and carbon (C). There are three more common polytypes of SiC, which are 3C-SiC, 4H-SiC, and 6H-SiC. Because of the structure of the polytypes it gives the material different electrical characteristics. The characteristics can be observed in Table 2.1 [28, 25]. Table 2.1: Properties of SiC polytypes Properties 3C-SiC 4H-SiC 6H-SiC Energy gap : Eg [eV] 2.40 3.26 3.02 Electron mobility µe [cm2/V s] 800 1000 400 Hole mobility µh [cm2/V s] 40 115 101 Breakdown field : EB [MV/cm] 2.12 2.2 2.5 Thermal Conductivity [W/◦K − cm] 4 4 4 Since the development of Si has stagnated, research in SiC material as substrate for transistors has been pursued for many years and now epitaxial SiC materials are available. SiC could be a possible successor of Si in order to develop high-power and high-frequency electronic applications. SiC has a breakdown field strength that is approximately ten times higher. This increase in breakdown field strength enables the applied voltage of SiC components to be ten times higher than comparable Si components. The advantages of SiC are low RDS(on), high voltage, fast switching 12 2. Theory speed, suitable for high-radiation environments and that it can operate at higher temperatures [28, 25, 29]. 2.3.3 GaN GaN is a semiconductor material that could be a possible successor of Si. The first High Electron Mobility Transistor (HEMT) made of GaN appeared in 2004 with a radio frequency (RF) depletion-mode. GaN is suitable for use in semiconductor power devices, RF components and Light-Emitting Diodes (LEDs) [30, 27]. The capability to conduct electrons in GaN is more than 1000 times higher than for Si. A significant characteristic of semiconductor materials is the breakdown strength, which is ten times higher for GaN than for Si. This means that the applied voltage for GaN is ten times larger than for Si. The advantages of GaN as a semiconduc- tor device are low RDS(on) (which result in low conduction losses), low cost, high switching speed (which result in lower switching losses), high current density, high operating strength, smaller size of the devices and lower internal capacitance (which results in lower losses in the device when charging and discharging) [30, 31, 32]. The usage of GaN in semiconductor devices, such as transistors, is still in the research stage and is not widely used in commercial products. This is due to little information about how GaN transistor works in practise and its disadvantages. However, the popularity of GaN transistors is growing. There are currently several manufacturers that produce GaN transistors, which will most likely lead to more commercially available products employing them in the near future. 2.4 WBG Materials Semiconductors with wider band gaps have many benefits compared with the com- monly used materials, silicon or other non-wide band gap materials. The develop- ment regarding WBG materials is new. Therefore, only a few companies develop these materials. The energy gap range for WBG materials is between 2 eV to 4 eV, while the regular materials (for example Si) have a band gap between 1 eV to 1.5 eV. The difference in band gap range for the WBG materials allows the com- ponents with these materials to have higher breakdown electric field. The common WBG materials are GaN and SiC. A comparison between SiC and Si shows that SiC has ten times higher breakdown electric field. Devices with WBG materials are more suitable for high-power and even high-temperature applications. Especially SiC since it allows higher current densities compared with the rest of the WBG materials. WBG materials can also operate at higher temperatures and switching frequency resulting in smaller components, lower costs and lower losses [7, 33]. A comparison of the properties of Si, SiC and GaN is presented in Table 2.2. 13 2. Theory Table 2.2: Comparison of the semiconductors Properties Silicon 3C-SiC 4H-SiC 6H-SiC GaN Energy gap: Eg [eV] 1.12 2.4 3.26 3.02 3.4 Electron mobility µe [cm2/V s] 1400 800 1000 400 1400 Hole mobility µh [cm2/V s] 471 40 115 101 <20 Breakdown field: EB [MV/cm] 0.25 2.12 2.2 2.5 3.5 Thermal Conductivity 1.5 4 4 4 2.3 [W/◦K − cm, atK = 300] WBG power electronics have many benefits within many applications, such as higher efficiency, higher breakdown voltages, higher switching frequency, higher tempera- tures and lower switching losses. Even though the WBG materials have many ben- efits, there are some disadvantages, and one of them is the high cost, since it is a new technology. Because of these disadvantages, there are only a few manufacturers that produce components in these materials. A byproduct of this is that there are only a few components out on the market made by these materials, compared with silicon [7, 33]. 2.5 Parasitic Elements Parasitic elements contributes to interference in an electric circuit. Depending on which component it is, the parasitic element has a certain interference in the over- all performance of the circuit. The effect of some of the parasitic elements can be neglected since they are small compared to the components’ effect in the overall per- formance [9]. The focus in this thesis are parasitic resistance, parasitic capacitance, and parasitic inductance. Parasitic resistance exist either in series or in parallel with inductances, capacitances and the tracks on the printed circuit board (PCB). The overall effect on the perfor- mance in a circuit with the parasitic resistance is negligible, since compared with the effect of the impedance, it is higher. The parasitic inductance can be divided into two parts, self inductance and mutual inductance. The parasitic inductance oc- curs when current flows through a conductor, which creates a magnetic field around it. The two parts of the parasitic inductance are proportional, because when one of them is reduced then the other one is also reduced. The effect of the parasitic inductance can cause unwanted energy exchange between the two circuits, which in turn affect the overall performance of the circuit. The effect of parasitic capac- itances increases when the frequency in the circuit increases, since the capacitor is inverse proportional to the frequency. This can be obtained in (2.7) and the overall performance of the circuit is affected because it couples interference in the circuit. Then the efficiency of the circuit is reduced because of the interference and the losses that occurs [9]. 14 2. Theory 2.5.1 Parasitic Elements Calculations In Figure 4.13 the buck converter with parasitic elements and with two MOSFETs is presented. Figure 2.5: Buck converter with parasitic elements and MOSFET as switch The parasitic elements in the MOSFET are given in its the data sheet. The self- resonant frequency can be expressed according to fo = ωo 2π = 1 2π √ LC , (2.11) where ωo is the self-resonant frequency in rad/s, L is the inductance value at a certain switching frequency and C is the parasitic capacitance of the inductor [20]. Transforming (2.11), the parasitic capacitance can be calculated according to C = 1 (2πfo)2L , (2.12) The iron resistance of the inductor can be calculated according to 15 2. Theory Rfe = U2 fe Pfe = U2 L,rms Pfe , (2.13) where Pfe is the iron losses in the core and Ufe is the voltage across the parasitic resistance and it is the same as the rms value of the voltage across the inductor [34]. The iron losses in the core in W of the parasitic resistance can be calculated according to Pfe = PV V, (2.14) where PV is the iron losses in the core in W/m3 and V is the volume of the inductor. In order to get the value of PV from a figure in data sheet, the magnetic flux needs to be calculated and it is achieved according to B = Li NAe , (2.15) where N is the number of turns in the inductor, i is the current ripple in the inductor and Ae is the effective magnetic cross section [20]. The number of turns in the inductor needed in order to achieve the inductance value can be calculated according to L = N2AL, (2.16) where AL is the inductance factor [20]. The expression of the parasitic resistance in the capacitor with the help of Figure 2.6 is expressed according to ESR = tan(δ) 1 ωC , (2.17) where tan(δ) is the dissipation factor, C is the capacitance at a certain switching frequency and ω is the angular frequency [35]. 16 2. Theory Figure 2.6: The vector of the capacitive load 2.6 Thermal Analysis The thermal analysis in this project consist of loss calculation of the converter and the thermal model of the MOSFET. The losses in the converter are calculated and estimated through analytical methods. The thermal model of the MOSFET is studied to understand how the junction temperature affects the losses in the converter. 2.6.1 Loss Calculations The voltage drop over the inductor’s resistive part can be expressed according to uL,drop = RLiL, (2.18) where RL is the internal series resistance of the inductor and iL is the current of the inductor [20]. The conduction losses of the inductor can be calculated according to PL,cond = 1 Tsw ∫ Tsw 0 iLuL,drop dt = RL Tsw ∫ Tsw 0 i2L dt = RLI 2 L,rms, (2.19) where IL,rms is the average rms current of the inductor and can be calculated ac- cording to 17 2. Theory IL,rms = √ 1 Tsw ∫ Tsw 0 i2 L dt = √ 1 Tsw (DTsw DTsw ∫ DTsw 0 i2 L dt + Tsw −DTsw Tsw −DTsw ∫ Tsw DTsw i2 L dt) (2.20) = √ D 6 ((IL − ∆iL 2 )2 + 4I2 L + (IL + ∆iL 2 )2) + 1−D 6 ((IL + ∆iL 2 )2 + 4I2 L + (IL − ∆iL 2 )2), where IL is the average inductor current [20]. With the help of (2.13), the magne- tization losses of the inductor can be rewritten according to PM = U2 L,rms Rfe , (2.21) The total losses for the inductor can be calculated according to PL,tot = PM + PL,cond (2.22) In order to calculate the total losses of the MOSFET, the losses can be divided in two parts: conduction losses and switching losses [20]. The total losses of the MOSFET can be expressed according to PMOSFET = Psw + Pc, (2.23) where Psw is the switching losses and Pc is the conduction losses [20]. The switching losses can be calculated according to Psw = (Wsw(on) +Wsw(off))fsw, (2.24) where Wsw(on) and Wsw(off) are the energy dissipated during on and off time of the switching event [20]. This can be calculated according to Wsw(on) = uMOSFET iMOSFET 2 trise, (2.25) 18 2. Theory Wsw(off) = uMOSFET iMOSFET 2 tfall, (2.26) where uMOSFET is the peak value of the square wave voltage pulse, iMOSFET the peak value of the square wave current pulse with the ripple, trise and tfall is the rise time and the fall time respectively [20]. The conduction losses can be calculated according to Pc = RDS(on)I 2 MOSFET,rms, (2.27) where RDS(on) is the static drain-to-source on-resistance and IMOSFET,rms is the rms current of the MOSFET [20]. This can be calculated according to IMOSF ET,rms = √ 1 Tsw ∫ Tsw 0 i2 MOSF ET dt = √ D 6 ((IL − ∆iL 2 )2 + 4I2 L + (IL + ∆iL 2 )2), (2.28) where iMOSFET is the current through the MOSFET [20]. The total losses over the MOSFET can also be calculated according to PMOSFET,tot = UMOSFET,avg IMOSFET,avg (2.29) The total losses over the diode when one switch and one diode are used in a buck converter can be calculated according to PDiode,tot = Udiode,avg Idiode,avg (2.30) where Udiode,avg is the average voltage over the diode and Idiode,avg is the average current through the diode. The losses of the capacitor can be expressed according to PC,loss = ESRI2 C,rms, (2.31) where IC,rms is the rms current in the capacitor [20]. The rms current can be calculated according to 19 2. Theory IC,rms = √ 1 Tsw ∫ Tsw 0 i2 C dt = √ 1 Tsw (DTsw DTsw ∫ DTsw 0 i2 C dt + Tsw −DTsw Tsw −DTsw ∫ Tsw DTsw i2 C dt) (2.32) = √ D 6 ((−∆iC 2 )2 + (∆iC 2 )2) + 1−D 6 ((∆iC 2 )2 + (−∆iC 2 )2) = √ D 6 (∆i2 C 2 ) + 1−D 6 (∆i2 C 2 ), In order to study if the converter has a good performance with small losses, the efficiency of the converter needs to be calculated and can be according to η = Eout Ein , (2.33) where Eout and Ein is the energy out from and in to the converter respectively and can be calculated according to E = ∫ t 0 v i dt, (2.34) where v and i is the voltage and current in to and out from the converter respectively depending if the calculation of the energy is in or out and t is the simulation time [20]. When a component is applied with a dc voltage and dc current both its internal resistance and its total losses can be calculated according to Ptot = Udc Idc (2.35) Rinternal = Udc Idc (2.36) 2.6.2 Thermal Model The transient thermal response of power devices could lead to a instantaneous dis- sipation that may exceed the average power rating of the device. The transient 20 2. Theory thermal response is originated during transient overloads or at power-up or power- down of a systems with power devices. If the junction temperature exceeds the maximum permitted value or not, depends on the power surges magnitude and du- ration but also of the thermal properties of the device. Figure 2.7 shows a thermal model of a power device where Cs is the heat capacity, Rt is the thermal resistance, Tj(t) junction temperature, Ta is the ambient temperature, and P (t) is the input power. Both the junction temperature and the input power depends on the time [20]. Figure 2.7: A general thermal model The thermal resistance, Rt is defined according to Rt = ∆T Pcond , (2.37) where ∆T is the temperature difference from the inside of the device to its surface [20]. The heat usually needs to flow through several different materials with different thermal conductivity. The total thermal resistance from junction to ambient can be calculated according to Rθja = Rθjc +Rθcs +Rθsa, (2.38) where Rθjc is the juction to case resistance, Rθcs is the case to sink resistance and Rθsa is the sink to ambient resistance [20]. The junction temperature of the thermal model can be calculated according to Tj = Pd(Rθjc +Rθcs +Rθsa) + Ta, (2.39) where Pd is the power dissipation [20]. The heat capacity of the sample from the thermal model is calculated according to 21 2. Theory Cs = CvAd, (2.40) where A is the cross section area of a rectangular block of material, d is the thickness and Cv is the heat capacity per unit volume [20]. The heat capacity can be calculated according to Cv = dQ dT , (2.41) where dQ is the change of the heat energy density Q and dT is the material tem- perature [20]. 2.7 EMC An interference between electric devices occur when they are connected to each other or closed. Electromagnetic Interference (EMI) is a result of unwanted higher harmonics in currents, voltages, or both. There are combinations of three factors that are the reasons that EMI occurs and these are: source, transmission path, and response. Where at least one of these factors is unplanned. Too much EMI can affect the functionality of devices in the environment negatively, which is undesired [36]. EMC is when the device behaves acceptably in the EMI environment, and at the same time does not generate too much EMI for other devices to function properly in near proximity to it. According to the European Commissions EMC directive, all electric devices need to be designed such that they are not generating, nor affected by the electromagnetic disturbances [36, 37]. Digital components that are located on a PCB assembly generates EMI. This EMI can take the shape of conducted voltages/currents, or as electromagnetic fields. Analog components are especially sensitive to exposure to radiated or conducted EMI. When designing a PCB there is a risk to not achieve the demand of the EMC compliance, and that the system causes harmful interference to both the outside environment, circuits and components in close proximity through the process of crosstalk. (Put simply, crosstalk can be regarded as interference at a localized level.) To counteract these risks, three areas are important to pay close attention to [38]: • Routing transmission lines based on design requirements. • Distributing power optimally to all components. This minimizes voltage fluc- tuations in both the power and ground planes. 22 2. Theory • Referencing signals to power and ground planes properly. 23 2. Theory 24 3 Procedure In this chapter the methods used in this project and the case set-up of the experiment are presented. 3.1 Method 1. A literature review was performed on WBG electronics where different transis- tor types were compared. From the literature study and the restriction of the dc/dc converters, a suitable transistor type was chosen. Three semiconductor materials - Si, SiC, and GaN - were studied and evaluated for the chosen WBG transistor. 2. The losses, efficiency, parasitic elements, and the size of the components of the converters were estimated and calculated through simulations of the dc/dc converter. The ripple and frequency range of the converters were studied by simulations. The simulations are done by using LTSpice and Matlab. The complete converter layouts were modelled in Altium Designer. 3. Selection of materials and components, and constructing a suitable design of the converters. Testing and evaluating the converters and the different WBG transistor materials were done. 4. Analysis, design, and results of the dc/dc converters and the different WBG transistors were documented in a report. 3.2 Case set-up The project specified some restrictions for the buck converters. These specifications can be seen in Table 3.1. 25 3. Procedure Table 3.1: Specifications for the buck converter Specifications Pin [W] 100 Vin [V] 40 Vout [V] 9.6 Iout [A] 9.6 fsw500 [kHz] 500 fsw200 [kHz] 200 In order to test and evaluate the different WBG transistors, measurement equip- ments were used. The measuring devices that were used in this project are presented in Table 3.2. Table 3.2: Measurement equipment used in this project Instrument Name Multimeter FLUKE 115 Function generator AFG-2105 Power supply EA-PS-2042-06B Oscilloscope DSO-X2014A Current probe DC N25783B Current probe AC CWT 015B ultramini Isolation transformer PFM 600 Heat camera FLIR I50 Thermometer TM-947SD Differential probe MX9030 The transistors that were tested, compared to each other, and used to evaluated the WBG transistors performance in this project are presented in Table 3.3. Table 3.3: The used transistors in this project Semiconductor Name Manufacturer Voltage Current rating rating [V] [A] Si STD47N10F7AG STMicroelectronics 100 45 GaN GS61004B GaN systems 100 45 26 4 Simulations In this chapter the simulation models of the two buck converters and their compo- nents are presented. Both a simplified simulation model and a model with parasitic elements were designed to evaluate how the different WBG materials would effect the converters efficiency. The simulation models were furthermore used as a tool to distinguish how the different waveforms would look like. They were also used as a benchmark for the practical design. The simulated WBG materials were Si and GaN only. SiC was not simulated or investigated more than a literature study which was presented in Subsection 2.3.2. The reason for that is because it is manufactured for high voltage applications and this project is targeting low voltage applications [39]. The chosen switching frequencies for each switch were 200 kHz for Si and 500 kHz for GaN. This is due to the limited time for the project and also, it is more interesting to simulate at higher switching frequencies. The reason GaN switchs were simulated at the higher switching frequency is because it is a WBG material and can operate at higher switching frequencies. This is mentioned in Subsection 2.3.3. 4.1 Circuit Simulations At first, an initial simplified simulation model of the two buck converters was created. This simplified model uses a buck converter with a switch and a diode, it can be seen in Figure 2.1. Another simplified simulation model that uses a buck converter with two switches instead was constructed and is illustrated in Figure 4.1. In Table 4.1 the values for the diode and the switches are presented. 27 4. Simulations Figure 4.1: Model of the simplified buck converter with two switches Table 4.1: Values for the diode and the switch in the simplified model Parameters Values Diode resistance: Ron [Ω] 0.001 Forward voltage of the diode Vf [V] 0.8 MOSFET resistance Ron [Ω] 0.02 Body diode resistance in MOSFET Rd [A] 0.01 The value for the switches in the simplified models was chosen to be similar to the value of the actual switch in the practical design according to Appendix C and Appendix D. The diode value was chosen so that it would have a realistic forward voltage but with no slope due to the lowRon value. This is since the simplified models should be similar to an ideal model. The efficiency for the simplified models were calculated according to (2.33). The total diode losses were calculated using (2.30 and the total MOSFET losses were calculated according to (2.29). A comparison of the different efficiency for the two simulation models is shown in Table 4.2. It is clear that the two switches in a buck converter is a better option since it will decrease the losses and increase the efficiency in the converter. This is due to that a diode has a larger voltage drop. In the practical design, a buck converter with two switches was therefore used. Table 4.2: Comparison of the simulation models Parameters Switch & diode Two switches Efficiency for 200kHz: η200 [%] 94.024 99.9 Efficiency for 500kHz: η500 [%] 94.026 99.9 Pdiode500 [W] 7.76 - Pdiode200 [W] 7.76 - PSwitch500 [W] 0.33 0.77 PSwitch200 [W] 0.33 0.77 The component sizes for the converters could be calculated by taking into account 28 4. Simulations the specifications of the project, which is presented in Table 3.1. Since the aim of the project was to design a compact dc/dc converter it resulted in that the size of the components, especially the inductor, should be as small as possible. In order to achieve a small value of the inductor, the chosen ripple of the iL was 10 % since the inductance decreases with higher ripple according to (2.4). However, higher current ripple results in larger losses according to (2.20) and it is therefore necessary to take that into consideration and not just focus on the size of the inductance. The voltage ripple of the conductor, ∆V c, should be small in order to get as close to a pure dc voltage as possible. However, with higher voltage ripple the capacitance increases according to (2.7). The chosen value for ∆V c was 0.05 %. The value of the capacitor and the inductor was calculated using (2.7) and (2.4), the values for the different frequencies is presented in Table 4.3. The load was calculated to 1 Ω using Ohm’s law in (2.2) with a Vout equal to 9.6 V and Iout equal to 9.6 A. Table 4.3: Values for the capacitance and inductance Parameters Values C200 [µF] 116.60 C500 [µF] 46.64 L200 [µH] 40.74 L500 [µH] 16.29 The type of switch chosen in this project was a MOSFET. When deciding which type of switch to use it is important to consider its operating range for voltage, current and frequency. In Figure 4.2 a comparison of the most common switches today and their ranges are presented. The frequency interval for this project was 100 kHz to 500 kHz and, as can be seen in the figure, only the MOSFET can operate at such high frequencies. Figure 4.2: Comparison of different type of switches 29 4. Simulations 4.1.1 Simulation of the Simplified Model with two Switches The simplified simulation model, with two switches, is simulated for the frequencies at 200 kHz and 500 kHz. This is since these frequencies is where both the extended simulations model and the actually design is operated at. The model is simulated with a load of 1.072 Ω which is the value of the actual load that was used in the practical design. The input voltage and current for the model is presented in Figure 4.3 and 4.4. Figure 4.3: Input voltage and current for fsw=200 kHz Figure 4.4: Input voltage and current for fsw=500 kHz As can be seen from these figures, the value of the input voltage is 40 V which is the same as the specification for the project. The input current is not a dc current, which it is in the practical design. The reason for the behaviour of the input current 30 4. Simulations waveform is because it is affected by the upper MOSFET in the circuit. When the upper MOSFET is turned off the current only flows through the LCR circuit, which makes the input current zero at the same time. The difference between Figure 4.3 and 4.4 is the difference in switch frequency. With fsw at 500kHz, it has a smaller period time than for fsw at 200kHz. The voltage over drain to source of both MOSFETs and the current through drain to source of both MOSFETs is shown in Figure 4.5 and 4.6. Figure 4.5: MOSFET voltage and current for fsw=200 kHz Figure 4.6: MOSFET voltage and current for fsw=500 kHz The total drain to source current from both the MOSFETs has a triangular be- haviour in the waveform, which can been seen at the peak of the waveforms in Figure 4.5 and 4.6. The reason for this is because of the inductor in the circuit. The inductor current (iL) consist of a triangular ripple and because of Kirchhoff’s 31 4. Simulations current law (KCL), Idsabove is equal to iL when the lower MOSFET is turned off. When the upper MOSFET is turned off, the Idsunder is equal to iL. The voltage over the inductor and the inductor current is shown in Figure 4.7 and 4.8. Figure 4.7: Inductor voltage and current for fsw=200 kHz Figure 4.8: Inductor voltage and current for fsw=500 kHz In a buck converter the inductor’s function is to store magnetic energy [20]. When the upper MOSFET is turned on, a positive voltage is applied over the inductor resulting in magnetic energy being stored in the inductor which can be concluded from Figure 4.5 and 4.7. When the upper switch is turned off, the stored magnetic energy in the inductor is dissipated to the load. This leads to that iL will decrease linearly. The figures also show that iL has a dc offset, which is a result from the load since the dc components of iL flow through the load. When the lower MOSFET is 32 4. Simulations turned on and off it will not affect the inductor voltage or current, as can be seen in Figure 4.5 and 4.7. The capacitors function in the buck converter is to both filter the output voltage so that it will be similar to a pure dc voltage and to store energy. The voltage over the capacitor is the result of the stored amount of charges and the capacitance in the capacitor [20]. The voltage over the capacitor and its current is presented in Figure 4.9 and 4.10. Figure 4.9: Capacitor voltage and current for fsw=200 kHz Figure 4.10: Capacitor voltage and current for fsw=500 kHz The output current iout should be a dc current and according to KCL iout = iL - iC which means that the ripple component from the inductor current needs to flow through the capacitor. From Figure 4.5 and 4.9 it can be seen that the 33 4. Simulations capacitor current consist of the inductor ripple without the dc offset. The output voltage and current from the model is presented in Figure 4.11 and 4.12. Figure 4.11: Inductor voltage and current for fsw=200 kHz Figure 4.12: Inductor voltage and current for fsw=500 kHz The figures show that the output voltage is a dc voltage with a small ripple according to the specifications of the project. The figures also show how the output current is a dc current with a small ripple. However, the current is slightly below the specified value of 9.6 A and the reason being that the load that was used is 1.072 Ω and not 1 Ω. 34 4. Simulations 4.2 Effect of Parasitic Elements In Section 4.1 a simplified model of a dc/dc converter was simulated, but in practice there are losses due to for example the parasitic elements that each component contains. A simplified model of the buck converter with parasitic elements with two MOSFETs can be obtained from Figure 4.13. Figure 4.13: Buck converter with parasitic elements and MOSFET as switch In Figure 4.13, the blue components indicate the parasitic elements for most of the components. Not all the parasitic components were considered because the model would be to complex. Therefore, only the parasitic elements from the components that have the largest effect on the circuit were considered. The values for the different parasitic elements and the gate components were first estimated, in order to get an approximated practical model. The exact values for the parasitic elements and the gate components are presented in Section 5.2. The values for the inductor, capacitor, the voltages etc. is the same as in the simplified model in Section 4.1. 35 4. Simulations 36 5 Design In this chapter the final designs of the dc/dc converters and selection of their com- ponents are presented. One of the dc/dc converter designs is with Si transistors and the other one is with GaN transistors. The two converters differ, since GaN transis- tors requires a different design in order to work. The design of the two converters was built in the 3D software called Altium Designer, in order to design them in 3D before ordering them. As mentioned in Chapter 4, SiC was not investigated further than a literature study. 5.1 Selection of Components All the components in the converters were RoHS compliance since they are more sustainable. The components were ordered outside EU, which means that it was not a requirement to order the component to pass the RoHS compliance. If they were ordered inside EU then all products in EU needs to pass the RoHS compliance. The choice of using RoHS compliance components was easy to make since it is good to have the converters as sustainable as possible. Most of the components are surface mounted in order to reduce the stray inductance in the converter. The definition of surface mounted is that the components are directly attached to the PCB. When having little space between the component and the PCB then a loop of magnetic field and stray inductance emerges, which leads to more disturbance in the converter. The component values were first calculated for each converter at their operating fre- quency. Then the selection of components was made, after the values was calculated in order to get as close to the calculated value as possible. Before the inductor, out- put capacitor and MOSFET could be selected their expected losses were calculated in both the simplified and parasitic simulation models in order to get as high effi- ciency as possible for the converter. The expected losses for the inductor, capacitor and MOSFET were calculated by inserting values from the components datasheets in the simulations models. 37 5. Design 5.1.1 Selection of the Si converter components The Si converter was designed for 100 kHz and the component values for the inductor and output capacitor were calculated for this frequency. In Table 5.1 a comparison of the calculated values and the selected values is presented. Table 5.1: Comparison of calculated values and selected values for the inductor and output capacitor Parameters Calculated value Selected value L100 [µH] 91.2 100 C100 [µF] 208.33 198 The chosen inductor is of the type ’fixed inductor’, which means that its wound turns of wire in the coil are fixed. It is important to consider both the current rating and the current saturation of the inductor when choosing an inductor. This is to ensure that the inductor can withstand the applied current but also so that it will not be saturated. The chosen inductor is a 100 µH inductor from the manufacture Bourns with the name 1140-101K-RC. In Table 5.2 the current rating and current saturation from Appendix E is compared to the average inductor current ( iLavg) from the Si converter. It can be seen that iLavg is lower than both the current rating and the current saturation which indicate that is was a suitable choice. Table 5.2: Current specification of the 100 µH inductor Parameters value Current rating [A] 10.5 Current saturation [A] 20.6 iLavg [A] 8.7 For the output capacitor nine 22 µF capacitors were chosen. By connecting the nine capacitors in parallel, the output capacitor got a value of 198 µF. The output capac- itor was of the type ’ceramic capacitor’. When choosing an appropriate capacitor it is important to consider the voltage rating. The reason that the nine capacitors in parallel were chosen over one bigger capacitor was because of the voltage rating. There were no available capacitors with the amount of capacitance needed and with the desired voltage rating. The selected capacitor was from the manufacturer United Chemi-Con with the name KTS500B226M76N0T00 and their voltage rating was 50 V, which can been seen in Appendix F. According to the project specification, the output voltage should be 40 V. The selected capacitor was therefore a suitable choice. The selected Si MOSFET was of the type ’surface mounted’ in order to decrease the stray inductance from the component. When selecting a MOSFET it is important to consider the current rating of Ids, the rating of the drain to source voltage (Vdss) 38 5. Design and the value of Rdson . It is suitable to have a margin for the applied Ids and Vds to the rating of Ids and Vdss to make sure that the MOSFET can operate safely. A low value of Rdson is preferable since it will give low conduction losses according to (2.27). The rating of Ids, Vdss and Rdson for the Si MOSFET was chosen to be similar to the GaN MOSFET, in order to make a fair comparison of the different materials. The selected Si MOSFET was from the manufacturer STMicroelectronics with the name STD47N10F7AG. In Table 5.3 the ratings for the Si MOSFET is presented. Table 5.3: Specification of Si MOSFET Parameters Value Vdss [V] 100 Ids [A] 45 Rdson [mΩ] 18 When selecting an appropriate gate driver, it is good to check the specifications of the MOSFET’s gate threshold voltage (Vgsth ) and how Vgs is varying with Id and Vds as well as comparing them to the gate driver’s power supply voltage. According to Appendix C the Vgsth is 4 V and therefore require the gate driver’s power supply voltage to be higher than 4 V. In Appendix C on page 6 it is presented how Vgs is varying with Id and Vds and that a preferable Vgs is 10 V. This indicates that the gate driver’s power supply voltage should be around 10 V. The selected gate driver Si8233 has a range of power supply voltages starting from 6.5 V up to 24 V, according to Appendix A. The gate driver’s power supply voltage was chosen as 12 V to give a margin to the 10 V from the Vgs value of the MOSFET. The selected gate driver had been used in a similar project at the company before, which affected the choice of gate driver since it was known that it would work suitable and within the specifications of the MOSFET. The capacitors and resistors for the gate driver circuit was selected by the recommendations of the IC in Appendix A. 5.1.2 Selection of the GaN converter components The GaN converter was designed for 400 kHz and the component values for the inductor and output capacitor were calculated for this frequency. In Table 5.4 a comparison of the calculated values and the selected values is presented. Table 5.4: Comparison of calculated values and selected values for the inductor and output capacitor Parameters Calculated value Selected value L400 [µH] 22.8 22 C400 [µF] 52.083 50 The selected inductor for GaN is also of the type ’fixed inductor’. The inductor 39 5. Design is from the manufacturer Wurth Electronics Inc. with the name 7443632200. In Table 5.5 the current rating and current saturation from Appendix G is compared to the average inductor current ( iLavg) from the GaN converter. It can be seen that iLavg is lower than both the current rating and the current saturation which indicate that is was a suitable choice. Table 5.5: Current specification of the 100 µH inductor Parameters Value Current rating [A] 12 Current saturation [A] 15 iLavg [A] 8.47 For the output capacitor, five 10 µF capacitor were chosen. By connecting the five capacitors in parallel, the output capacitor got a value of 50 µF. The output capacitor was of the type ’ceramic capacitor’. The selected capacitor was from the manufacturer TDK Corporation with the name CGA6P3X7S1H106K250AB and the voltage rating is 50 V according to Appendix H. According to the project specification the output voltage should be 40 V, which made the selected capacitor a suitable choice. The selected GaN MOSFET was also of the type ’surface mounted’. Since GaN MOSFETs are new on the market, the supply is quite limited. The limited selection of GaN MOSFETs was the reason that the rating of Ids was 45 A and Vdss was equal to 100 V in order to get a low voltage application with a safety margin. The selected GaN MOSFET was from the manufacture GaN Systems with the name GS61004B. In Table 5.6 the ratings for the GaN MOSFET is presented. Table 5.6: Specification of Si MOSFET Parameters Value Vdss [V] 100 Ids [A] 45 Rdson [mΩ] 15 The similarities between Table 5.3 and 5.6 implies that a comparison of the two materials will be fair, based on their parameter values. The selected gate driver for the GaN converter was from the manufacturer TEXAS INSTRUMENTS with the name LM5113. According to Appendix D, for the GaN MOSFET the Vgsth is 1.3 V and therefore needs the gate driver’s power supply voltage to be higher than 1.3 V. In Appendix D at page 4 it is presented how Vgs is varying with Id and Vds and that a preferable Vgs is 5 V to 6 V. This indicates that the gate drivers power supply voltage should be around 5 V. The selected gate driver LM5113 has a range for power supply voltages from 4.5 V to 5.5 V according 40 5. Design to Appendix B. The gate driver’s power supply voltage was chosen as 5 V. The selected gate driver had been used in a similar project from the GaN MOSFET manufacture GaN System where they recommended the selected gate driver for the selected MOSFET. The capacitor and resistors for the gate driver circuit was selected by the recommendations of the IC in Appendix A. 5.2 dc/dc Converter The final design of the two buck converters, one with Si transistors and one with GaN transistors, can be seen in Figure 5.1. It can be seen that the converter with the GaN transistors is smaller since it has smaller components, most significant is the inductor (white cylindrical for Si and black butterfly shaped for GaN) and the capacitors (nine next to the inductor for Si and 5 next to the inductor for GaN). Figure 5.1: The final design of the buck converters with both Si (on the right) and GaN transistors (on the left) respectively Both the converters were weighted and measured in order to compare if the theory behind the WBG semiconductor is accurate (smaller size at higher switching fre- quency). The weight and the measurements of the two converters are presented in Table 5.7. Table 5.7: The weight and measurements of the two converters of the final circuit Semiconductor Components Weight Area Piece price [SEK] Converter 204 170 x 84 Si Inductor 102 19.052 x π 12.19 MOSFET <1 9.725 x 6.50 Converter 108 150 x 84 GaN Inductor 15 21.5 x 21.8 55.91 MOSFET <1 4.6 x 4.4 41 5. Design As the table clearly shows, the size of the components for the GaN converter is smaller and thereby has less weight than those of the Si one. The weight of the converter with Si transistors is almost two times more. The results match the theory, namely that at higher frequencies the size of components decrease. The buck converter with GaN transistors was designed for 400 kHz and for the Si converter it was designed for 100 kHz. The reason the design was for 100 kHz and 400 kHz is because that then the converters could also operate at 200 kHz and 500 kHz respectively. This is since it was decided that the converter with Si transistors should operate at 100 kHz and 200 kHz, and 400 kHz as well as 500 kHz for the converter with GaN transistors. The reason neither of the converters was operated at 300 kHz was due to the time limitation of the project. 5.2.1 Schematic of the two dc/dc Converters The schematic of the two converters is presented in Figure 5.2 and 5.3. From the figures it can be seen that the design regarding the two converters are different because of the different transistor materials. One obvious difference between the two converters is the difference in gate drivers for the transistors. The set-up of the gate driver contains an IC, gate resistances, and a bootstrap capacitance. The amount of gate resistances and bootstrap capacitors depends on the chosen IC. This is since different ICs have different amount of input and output signals. The schematic of the chosen ICs are designed the same as a datasheet for the two different ICs. The chosen IC for the Si transistors was Si8233 och for GaN it was LM5113. The datasheet of the design and the pin configuration of the IC for Si can be seen in the pages 31 and 33 in Appendix A. The same thing for GaN can be seen in pages 1, 3 and 4 in Appendix B. 42 5. Design Figure 5.2: The schematic of the final design for the buck converters with Si transistors 43 5. Design Figure 5.3: The schematic of the final design for the buck converters with GaN transistors The four capacitors before the MOSFET above (C22S3, C23S3, C24S3, C25S3 for Si and C1S2, C2S2, C3S2, C4S2 for GaN) are present to make the input current as dc as possible, instead of a square wave current from the square wave pulse and also to 44 5. Design reduce the ripples and the disturbances. The four capacitors for each converter are highlighted with a red circle and can be obtained from Figure 5.4 and 5.5. Figure 5.4: The capacitors to filter the input current in the converter with Si transistors Figure 5.5: The capacitors to filter the input current in the converter with GaN transistors In the buck converter with the GaN transistors, a logic circuit had to be designed since it was not present in the initial chosen IC for the gate driver. The logic circuit is needed to regulate the deadband for the logic signal into the IC. For the converter with the Si transistors a logic circuit was already present. The set-up of the logic circuit for the GaN transistors can be obtained in Figure 5.3, below the design of the buck converter. In Figure 5.6 the eight capacitors (C13S2, C14S2, C15S2, C16S2, C17S2, C18S2, C19S2, C20S2) represent logic gates, namely NOT and AND gates. They were implemented in order to filter out disturbances and keep the logic voltage smooth and continuous. This is to ensure that the logic circuit do not vary when they switch from high to low signals. A good design should include these capacitors since they reduce the ripple on the input voltage for the logic gates. The last capacitor (C12S2) is for the IC and functions in the same as the mentioned eight capacitors, but for the IC instead. It should be close to the IC to maximize the performance of the gate driver. 45 5. Design Figure 5.6: The capacitors for the logic circuit in the converter with GaN transis- tors The reason for the deadband in the logic signals is to prevent the two MOSFETs to be turned on or off at the same time. The deadband was designed to be in ns, this is because when having a to large deadband it causes more losses in the converter. This occurs due to that the body diode in the MOSFETs conduct at that time (the time of the deadband) and the diode has more losses than the MOSFET. The deadband of the logic signals from this designed logic circuit for the GaN converter can be seen in Figure 5.7. Figure 5.7: The deadband of the logic signals for the GaN converter In both the converters there are interruption in the circuit in three places: one before the MOSFET above, one after the MOSFET below, and one after the inductor. These are marked with a red circle for both the Si and GaN converter and can be seen in Figure 5.8 and 5.9. This is to test the converters for disturbances and see how they operate when applying a disturbance source. The disturbance was applied by adding a larger metal wire, since larger metal wires lead to more magnetic field and stray inductance. With more magnetic field and stray inductance it results in more oscillation in the voltage and the current. 46 5. Design Figure 5.8: The interruptions in the converter with Si transistors Figure 5.9: The interruptions in the converter with GaN transistors 47 5. Design 48 6 Analysis In this chapter the dc/dc converters performance and the WBG materials effect on the performance will be evaluated. The results of the simulated parasitic models, the measurement of the practical designs and a comparison between them are presented. 6.1 Component and Parasitic Element Classifica- tion To have an idea on how much losses each component contributes, the parasitic elements of the components need to be measured. This was done with the measur- ing device, bode100. The parasitic elements of the capacitor are Equivalent Series Inductance (ESL) and Equivalent Series Resistance (ESR). By measuring the mag- nitude, with respect of the switching frequency, at certain phases the two parasitic elements can be extracted. The value of ESL was measured when the phase, ϕ, was at 90◦ because at that phase the capacitor becomes inductive. The value of ESR was measured when the phase was at 0◦ because at that phase the capacitor becomes resistive. The value of the capacitor was measured when ϕ was at -90◦, to verify that it was correct. The same procedure was applied for the measurement on the inductor, but the parasitic elements of the inductor are Direct Current Resistance (DCR), iron resistance (RFe) and the parasitic capacitance (Cp). The measurement of RFe was performed when ϕ was at 0◦ and for Cp when ϕ was at -90◦. The value of the inductor was measured when ϕ was at 90◦. The value of DCR could not be measured with the bode100, it was instead measured by using a Kelvin connection which can handle small loads. The connection can be seen in Figure 6.1. 49 6. Analysis Figure 6.1: Kelvin connection used to measure DCR The input voltage to the Kelvin connection was tested for three different voltage values, to ensure a correct value of DCR in the inductor. The three input voltages were 1 V, 2 V, and 3 V which allowed the current (A) and the voltage (V) to be measured using the FLUKEs. With the voltage and current value obtained, by using Ohm’s law the DCR value was calculated. The parasitic elements for the MOSFET are the parasitic inductance on the drain, gate, and source (LD, LG and LS), internal resistance (RDS(on)) and internal ca- pacitances (Ciss, Coss and Crss). The parasitic inductances of the MOSFET were also measured by the bode100. By measuring the inductance on the drain, gate, and source of the PCB, the values of the inductances were obtained for ϕ = 90◦. RDS(on) of the MOSFET was measured by heating up the MOSFET to a tempera- ture corresponding to when the input voltage was at 40 V. More details regarding how the measurement was performed can be seen in Thermal Analysis in Section 6.3. Ciss, Coss and Crss were not measured since they are temperature dependent, which makes it difficult to get correct measurements. The values for those were instead taken from the datasheet in page 4 in Appendix C for the Si transistor and in page 3 in Appendix D for the GaN transistor. The values from all the measurements for both converters are presented in Table 6.1 and 6.2. 50 6. Analysis Table 6.1: The values of the parasitic elements of the components for the two converters Components Parasitic Values Values from Values from elements measurement datasheet Cp 25.448 pF LSi DCR 18.9 mΩ 88.391 µH 100 µH RFe 37.547 kΩ CSi ESL 984.827 pH 20.938 µF x 9 22 µF x 9 ESR 9.555 mΩ Cp 4.065 pF LGaN DCR 10.8 mΩ 19.951 µH 22 µH RFe 7.774 kΩ CGaN ESL 359.631 pH 9.321 µF x 5 10 µF x 5 ESR 5.162 mΩ Table 6.2: The values of the parasitic inductances of the PCB for the two converters Parameters Components Values [nH] before MOSFETupper 16.860 between the MOSFETs 8.383 LSi after MOSFETlower 15.842 gate driver MOSFETupper 21.732 gate driver MOSFETlower 30.705 before MOSFETupper 12.204 between the MOSFETs 9.701 LGaN after MOSFETlower 12.141 gate driver MOSFETupper 10.434 gate driver MOSFETlower 19.904 6.2 Parasitic Element Model In Section 6.1 measurements of each component’s parasitic elements were performed. In order to adapt the simulation models of the two converters to be as close to real converters, the parasitic elements were added to the models. This is to improve the simulation model and get as accurate measurements as possible, regarding the losses, efficiency, waveforms etc. 6.2.1 Simulated Parasitic Element Model In Figure 6.2 and 6.3, the input voltage and current for both converters from the simulations are presented. The Si converter has a switching frequency of 200 kHz 51 6. Analysis and GaN has a switching frequency of 500 kHz. Figure 6.2: Input voltage and input current for the Si simulation with fsw=200 kHz Figure 6.3: Input voltage and input current for the GaN simulation with fsw=500 kHz From the two figures it can be observed that the input voltage for both of the converters is as expected, a smooth dc signal at 40 V. On the other hand, the input current has more oscillations on both converters but more in the Si converter. The reason for the oscillations on the input current is because of the stray inductance between the input signal and the upper MOSFET. The reason that the Si converter has more oscillations is because the design of the real converter was not as tight as for the GaN converter, which resulted in more stray inductance in the Si converter. Another reason is that all the parasitic elements in the Si converter are larger than 52 6. Analysis for the GaN, as can be seen in Table 6.1 and 6.2. This results in more disturbances in the Si converter. The internal capacitances such as Ciss, Coss and Crss are also larger in the Si transistor than for the GaN transistor when comparing Appendix C at page 4 with Appendix D. The higher internal capacitance could also be an explanation as to why the Si converter has more oscillations in the input current. The reason that the GaN converter has more periods in the plot is because it has a higher switching frequency, which results in more switching in the same amount of time. In practice, the input current should also be a dc signal and not only the input voltage. The reason for the square wave pulse behaviour is due to that there are no capacitors before the upper MOSFET, which filter the current to be a dc signal. This is mentioned in Section 5.2. In Figure 6.4, 6.5, 6.6 and 6.7, both the current and voltage of the MOSFETs for both converters (200 kHz for Si and 500 kHz for GaN) can be seen. Figure 6.4: Vds and Ids for the Si simulation with fsw=200 kHz Figure 6.5: Vds and Ids for the GaN simulation with fsw=500 kHz 53 6. Analysis From Figure 6.4 and 6.5 it can be observed that both the drain-to-source current (Ids) and the drain-to-source voltage (Vds) have oscillations. The Si converter has more oscillations compared to the GaN converter. It is reasonable for the oscillations to occur due to the addition of the parasitic elements to the model. The parasitic elements for the Si converter were larger than for the GaN converter, which resulted in more oscillations in Ids and Vds for the Si converter. Figure 6.6: Vgs for the Si simulation with fsw=200 kHz Figure 6.7: Vgs for the GaN simulation with fsw=500 kHz In Figure 6.6 and 6.7 the gate-to-source voltage (Vgs) of the two converters behave as the expected square wave pulses, but with no oscillations at all. This is because they are simulation models and do not take into account the outer losses in the surrounding. According to theory, Vgs of both converters should have oscillations due to the parasitic elements added to the models. In Figure 6.8 and 6.9, the inductor voltage and current for both the converters is presented. 54 6. Analysis Figure 6.8: VL and IL for the Si simulation with fsw=200 kHz Figure 6.9: VL and IL for the GaN simulation with fsw=500 kHz The inductor voltage and current of both the converters contain oscillations, which can be seen in Figure 6.8 and 6.9. The reason for this kind of behaviour is again due to the addition of parasitic elements to the models. By adding parasitic elements, it results in more losses in the converter because of the oscillations that occurs in the components. Also here the Si converter have more oscillations due to the larger value of the parasitic elements. In Figure 6.10 and 6.11, the capacitor voltage and current for both the converter can be seen. 55 6. Analysis Figure 6.10: VC and IC for the Si simulation with fsw=200 kHz Figure 6.11: VC and IC for the GaN simulation with fsw=500 kHz Even in Figure 6.10 and 6.11 oscillations on both the voltage and current occurs. The Si converter have more oscillations, and this result is as expected since the parasitic elements creates more disturbance in the converters and with larger values on the parasitic elements it result in more oscillations. In Figure 6.12 and 6.13 the output voltage and current of the two converters can be obtained. 56 6. Analysis Figure 6.12: Vout and Iout for the Si simulation with fsw=200 kHz Figure 6.13: Vout and Iout for the GaN simulation with fsw=500 kHz In Figure 6.10 and 6.11, the Si converter has more oscillations with higher peaks compared to the GaN converter. Another reason that the Si converter have more oscillations in the components is due to that the design of GaN was tighter. This was possible due to the Si converter having larger component sizes, which takes more place in the converter and results in the design not being as tight as the GaN converter. The size of the components also resulted in a larger value for the parasitic elements, which leads to more and larger oscillations. The output current is almost a dc current which is reasonable since the LC circuit, before the load, filter the disturbance and the ripples. 57 6. Analysis 6.2.2 Performance of the PCB The equipments used for the measuring of the dc/dc converters are presented in Table 3.2 in Section 3.2. In Figure 6.14 and 6.15, the input voltage and current for both converters measured in the lab are presented. Figure 6.14: Vin and Iin for the Si measurement with fsw=200 kHz Figure 6.15: Vin and Iin for the GaN measurement with fsw=500 kHz The result of the waveforms measured in the lab were as expected. Both the current and the voltage are dc signals because in the real design there are capacitors before the upper MOSFET (mentioned in Section 5.2), which filter the current and make it a dc signal. The oscillations on the other hand are due to the parasitic elements in the components and the stray inductances from the PCB. The input voltage is not as smooth as in Figure 6.2 and 6.3 since the simulations do not account for 58 6. Analysis the temperature, air etc. in the surrounding and the cables. These aspects could cause further disturbances in the converter. The reason that the input current is not entirely a dc signal is because the value of the capacitors before the upper MOSFET are not large enough to reduce all the ripple. With a larger capacitance value on the capacitors, it reduces the ripple even more. In Figure 6.16, 6.17, 6.18 and 6.19, the voltage and the current for the MOSFETs can be observed. Figure 6.16: Vds and Ids for the Si measurement with fsw=200 kHz Figure 6.17: Vds and Ids for the GaN measurement with fsw=500 kHz From Figure 6.16 and 6.17, Vds and Ids for both converters have oscillations. There are more oscillations and they are larger in Vds than for Ids. There are more os- cillations in Vds for the GaN converter compared to the Si converter and this leads to more losses in the GaN converter, which in turn results in lower efficiency. The 59 6. Analysis comparison of the efficiency between the simulations and the measurements is pre- sented in Table 6.10 in Section 6.5. The result from the simulations indicated that there should be more oscillations in the Si converter and not the GaN. One theory is that the gate driver of the GaN converter was not as good as the gate driver for the Si converter. The gate driver of the Si converter was tested and improved in other projects before it was used in this project. The gate driver for the GaN converter was not tested before since work with GaN transistors is still new. On the other hand, the current peak in the Si converter was higher than for the GaN converter. The reason for that is probably because of the inductor in the Si converter, since it has a larger value on the parasitic elements than the inductor in the GaN converter. Figure 6.18: Vgs for the Si measurement with fsw=200 kHz Figure 6.19: Vgs for the GaN measurement with fsw=500 kHz In Figure 6.18 and 6.19, Vgs has the same behaviour as for Vds where the oscillations are more in the GaN converter. The theory behind it has already been explained in the section below Figure 6.16 and 6.17. In Figure 6.20 and 6.21, the inductor voltage and current of the real converters can be seen. 60 6. Analysis Figure 6.20: VL and IL for the Si measurement with fsw=200 kHz Figure 6.21: VL and IL for the GaN measurement with fsw=500 kHz The waveforms from the measurements are as expected when comparing them to the simulation waveforms in Figure 6.8 and 6.9. On the other hand, the inductor current for both converters is better in the measurements than in the simulations. The appearance of the currents are more similar to the waveforms of the ideal models. The current for the GaN converter has slightly higher peaks than for the Si converter. There are more oscillations in the GaN converter compared to the Si converter, but the oscillations have lower peaks. The current ripple of both converters is not large, this means that the goal of having a current ripple within 10 % in the inductor seems to be achieved. The capacitor voltage and current of the converters are presented in Figure 6.22 and 6.23. 61 6. Analysis Figure 6.22: VC and IC for the Si measurement with fsw=200 kHz Figure 6.23: VC and IC for the GaN measurement with fsw=500 kHz The behaviour of the capacitor voltage and current is as expected since the voltage ripple for both converters is very small, as can be seen in Figure 6.22 and 6.23. This leads to almost a dc signal which was the purpose of the design of the two converters, to have a voltage ripple of 0.05 %. This small ripple in the capacitor voltage is achieved in the practical design. The current ripple of the capacitor is the same as the current ripple of the inductor, but the inductor has an offset of the output voltage. The small peaks in the capacitor voltage for the two converters is because of the disturbance created from the equipment used in order to measure the voltage and current. In Figure 6.24 and 6.24, the output voltage and current of the converters can be seen. 62 6. Analysis Figure 6.24: Vout and Iout for the Si measurement with fsw=200 kHz Figure 6.25: Vout and Iout for the GaN measurement with fsw=500 kHz The output voltage and current are as expected since the output current should be a dc signal and the the output voltage is designed to have a very small ripple. The output voltage is the same voltage as for the capacitor, this is since the load and the capacitor are in parallel. The reason that the output current is a dc current is due to the LC circuit, before the load, that filter the disturbance and the ripples from the switches. 63 6. Analysis 6.3 Thermal Analysis In this section the temperature of the circuits, components and the losses of the circuits are evaluated and presented. How the different WBG materials affect the circuits in a thermal aspect are also studied and discussed. The project did not have any temperature restrictions, however if the converter would be used in for example an electrical vehicle it would have such restrictions. The MOSFET components have temperature restrictions, which are described in Appendix C and D. If the MOSFET would exceed its temperature restriction the component would break. 6.3.1 Temperature measurement on the PCB The temperature of both converters was monitored to evaluate the converters’ tem- perature during operation. The temperature measurements were also monitored to see if the different types of transistor material would have any impact. The equipments used for the temperature measurements were a thermometer and a heat camera. The thermometer wires with heat sensors were placed on the component using electro-lube and heat resistance tape. Heat sinks to decrease the temperature of the MOSFETs even more were used in the converter. The temperature measurements were performed both with a duty cycle of 24 % and with an adjustable duty cycle. From an ideal perspective, the duty cycle that is set in the function generator should give the calculated voltage. However, in the reality there are losses which means that if the duty cycle always stands at 24 % in the function generator it will not achieve the expected output voltage. In order to achieve the expected output voltage, the duty cycle was therefore adjusted. The duty cycle is calculated according to 2.1, where the theoretical Vout is equal to 9.6 V for a duty cycle of 24 %. The measured temperatures for the two converters with fsw=200 kHz and fsw=500 kHz respectively are presented in Table 6.3 and 6.4. Table 6.3: The measured temperature for the Si converter Vout D η Temp. Temp. Temp. MOSFETupper MOSFETlower L [V] [%] [%] Heat camera/ Heat camera/ [◦C] Thermometer Thermometer [◦C] [◦C] 7.94 24 92.96 56.4/55.8 81.5/79 45/44 9.59 28.4 92.85 69.4/67.3 101/98.5 50.5/48.6 64 6. Analysis Table 6.4: The measured temperature for the GaN converter Vout D η Temp. Temp. Temp. MOSFETupper MOSFETlower L [V] [%] [%] Heat camera/ Heat camera/ [◦C] Thermometer Thermometer [◦C] [◦C] 7.99 24 91.92 99.5/102.8 79.1/85.2 64.9/54.9 9.61 28.6 91.52 126/137.1 106/111.2 74.5/64.3 From Appendix C on page 7, it can be seen that the maximum allowed temperature for the Si MOSFET is 175◦C. According to Table 6.3 it can been seen that the maximum temperature during operation was 101◦C for the lower MOSFET which is a good margin. The reason why the lower MOSFET is warmer then the upper MOSFET is because Iavg(dslower) is larger then Iavg(dsupper) since the lower MOSFET is turned on more in one switching period (24 % for the MOSFET above and 76 % for the MOSFET below). According to Appendix D on page 2, the maximum allowed temperature for the GaN MOSFET is 150◦C. According to Table 6.4 the maximum temperature during operation was 137◦C for the upper MOSFET, which is a decent margin. The reason the upper MOSFET had a higher temperature than the lower MOSFET is because of the gate driver circuit did not function properly for the upper MOSFET. In Figure 6.19 it is shown that Vgs has both a voltage overshoot and a lot of oscillations for the upper MOSFET compared to the lower MOSFET. This indicates that the gate driver circuit did not function correctly. The reason why the gate driver did not work properly is unkown. 6.3.2 Losses on the PCB From the temperature measurements it was clear the components that generated most heat were the MOSFETs and the inductor in the converters. This indicates that the highest losses in the circuit were from the MOSFETs and the inductor. In order to calculate the losses for the MOSFETs and the inductor, the components were connected using a Kelvin connection seen in Figure 6.1, while the temperature was measured. The component was applied with a dc current and dc voltage in order to increase its temperature. When the temperature got the same value (see Table 6.3 and 6.4 with D=24 %) as from the measurement when Vin was 40 V, the voltage over the component and the current through it was noted. The noted voltage and current are presented in Table 6.5. 65 6. Analysis Table 6.5: The measured dc voltages and dc current for the temperature measure- ment Idc [A] Vdc [mV] LSi 9.03 186.1 LGaN 11.23 137.5 MOSFETupperSi 7.7 134.3 MOSFETupperGaN 10.64 272.5 MOSFETlowerSi 9.66 203.3 MOSFETlowerGaN 9.57 210.1 From the measured voltage and current in Table 6.5, the internal resistance and the total losses for the components under operation were calculated. The total losses for the components were calculated using (2.35) and the internal resistance was calculated using (2.36). The RMS currents of the MOSFETs and the inductors for both the converters were calculated from the collected data from the measurements of the PCB when the waveforms was studied in Subsection 6.2.2. The RMS currents were calculated using (2.20) and (2.28). With the internal resistances and the measured RMS currents of the components, the conduction losses were calculated according to (2.27) and (2.31). The measured RMS currents, the internal resistances, the losses for the MOSFETs and the losses for the inductors for both the converters are presented in Table 6.6. The switching losses for the MOSFETs can not be measured in practice and can therefore only be estimated according to (2.23) and it is referred to as Pother in Table 6.6. Table 6.6: The losses and the internal resistance for the MOSFET and Inductor Plosstot Pcond Pother DCR /Rdson Irms [W] [W] [W] [mΩ] [A] LSi 1.68 1.09 0.59 20.6 7.28 LGaN 1.54 0.66 0.88 12.2 7.34 MOSFETupperSi 1.03 0.16 0.87 17.4 3.02 MOSFETupperGaN 2.13 0.20 1.937 22 3.07 MOSFETlowerSi 1.96 0.20 1.76 21 3.09 MOSFETlowerGaN 2.07 0.20 1.87 21.2 3.04 Pother in Table 6.6 is the difference between Plosstot and Pcond. For the inductors, Pother represents the magnetization losses and the skin effect losses. From Table 6.6 it is clear the largest part of the losses for the MOSFETs is the switching losses. These switching losses increase with an increasing switching frequency, which is also shown in (2.24). According to Table 6.6 the MOSFET losses are larger than the inductor losses. 66 6. Analysis 6.3.3 Losses from the Simulations In the parasitic simulation models, the losses for the inductor and the MOSFETs were calculated in order to make a comparison between the simulation model and the practical design. In Table 6.7, the losses of the parasitic simulation models of both converters are presented. Table 6.7: The losses of the parasitic simulation models Plosstot [W] Pcond [W] Pother [W] LSi [µH] 1.43 1.56 - LGaN [µH] 0.73 2.44 - MOSFETupperSi [µF] 0.62 0.34 0.28 MOSFETupperGaN [µF] 2.03 0.43 1.6 MOSFETlowerSi [µF] 1.26 1.05 0.21 MOSFETlowerGaN [µF] 2.53 1.36 1.17 When comparing the parasitic simulation models with the practical models, it be- comes clear that the simulation models do not work correctly when calculating the inductor lo