Mikroteknologi och nanovetenskap (MC2) // Microtechnology and Nanoscience (MC2)http://hdl.handle.net/20.500.12380/19https://odr.chalmers.se/retrieve/ffb5f101-d3ab-46a9-9461-f4dac4f92ddb/2024-03-28T19:01:49Z2024-03-28T19:01:49Z26911D Edge Contacts to 2D Material HeterostructuresKarpiak, Bogdanhttp://hdl.handle.net/20.500.12380/3023482023-02-10T08:39:55Z2021-01-01T00:00:00Zdc.title: 1D Edge Contacts to 2D Material Heterostructures
dc.contributor.author: Karpiak, Bogdan
dc.description.abstract: Graphene has been in the focus of research in many fields of applications due to its
unique properties. In particular, the 2D nature, low charge carrier concentration and
high mobility of carriers are promising properties for the use in magnetic Hall sensors.
At the same time, low spin-orbit coupling and negligible hyperfine interactions make
it interesting for spin-polarized electron transport. However, single graphene layer,
if unprotected, is prone to defects introduced during fabrication processes and also
defects due to interfaces with other insulators or contact materials. These factors
would inevitably lead to decrease of graphene device performance. By encapsulating
graphene in hexagonal boron nitride (h-BN), another insulating atomically flat twodimensional
(2D) material with superior interface properties with graphene, one
can fabricate heterostructures for robust and high-performance devices. Utilizing
one-dimensional (1D) edge contacts to graphene sheet in such devices based on
2D materials would also allow to minimize contacts-induced degradation of channel
properties.
The graphene/h-BN heterostructures for studied devices were prepared both by
exfoliation from bulk crystals and by transfer of CVD-grown materials over large
area. After patterning the 2D heterostructures, 1D edge contacts were fabricated
by means of electron or laser beam lithography and electron beam evaporation of
metals. In these devices, proof-of-concept for batch fabrication of Hall elements on
large area all-CVD h-BN/graphene/h-BN heterostructures is demonstrated. Such
1D edge contacts of ferromagnetic materials to graphene/h-BN heterostructures are
also explored for spin injection into graphene in devices with novel design.
The findings described in this thesis allow to advance the graphene Hall elements
fabrication technology towards large-scale, industry-compatible manufacturing and
lay basis for understanding and further optimization of the phenomena that drive
and influence the operation of graphene spin-based devices with novel design involving
1D edge contacts.
2021-01-01T00:00:00ZA 200 GHz Subharmonic Resistive Mixer and an IF Amplifier Based on GFETsZhang, Yaxinhttp://hdl.handle.net/20.500.12380/2391672023-02-10T08:39:48Z2016-01-01T00:00:00Zdc.title: A 200 GHz Subharmonic Resistive Mixer and an IF Amplifier Based on GFETs
dc.contributor.author: Zhang, Yaxin
dc.description.abstract: In recent years, graphene, a two-dimensional monolayer of carbon atoms, has rapidly attracted great attention in high-speed electronics. The promising property such as the high intrinsic carrier mobility as well as high carrier saturation velocity make graphene a potential candidate for high-speed transistors operating in the millimeter wave and the terahertz frequency ranges. In this thesis, a 200 GHz subharmonic resistive mixer and a microwave amplifier based on graphene FET (GFET) are presented. The mixer is designed to down convert 200 GHz to 1 GHz with LO frequency of 100.5 GHz, and the amplifier is operating at 1 GHz. A large-signal GFET model is set up in a standard circuit simulator for the mixer and amplifier device optimisation as well as circuit-device integrative simulation. The device of the amplifier has a gate length 1 μm and a width 2 x 120 μm, and the mixer GFET is designed as Lg · Wg = 0.5 · 80 μm2. An array of bow-tie structured graphene nanoconstructions is applied in the mixer GFET channel to obtain simultaneously a right impedance level as well as a higher current on-off ratio. Chemical vapor deposition (CVD) method is utilised for graphene preparation, and the mixer and amplifier circuit are realised in coplanar waveguide (CPW) technology on a 100 μm thick high resistive silicon substrate. A planar inductor is applied in the amplifier design for the purpose of input matching as well as circuit’s integration. Metal air-bridges are added in final layout for reducing circuit discontinuities and parasitic mode propagation at the circuit T junction. Full-wave EM simulations are used for the passive circuits design. The first version of integrated receiver circuit including the designed mixer and amplifier is also fabricated. The conversion loss (CL) of the mixer over the RF frequencies from 190 to 210 GHz is measured to be 34 dB ± 3 dB, with the minimum CL of 31.5 dB at 190 GHz and 10 dBm LO pump power. The amplifier power gain is measured to be 6 dB at 1 GHz.
2016-01-01T00:00:00ZA categorical order theory of pulse scheduling in gate-based quantum computingAndersson, Axelhttp://hdl.handle.net/20.500.12380/3059942023-02-25T01:41:39Z2023-01-01T00:00:00Zdc.title: A categorical order theory of pulse scheduling in gate-based quantum computing
dc.contributor.author: Andersson, Axel
dc.description.abstract: We define a preorder on a vector space of complex valued integrable functions on
the non-negative real numbers. This preorder is then used to develop a scheduling
theory for microwave pulse schedules with an application for quantum computer
experiments on superconducting circuits. The scheduling theory is further developed
in a categorical framework using a subcategory of Ord, the category of preordered
sets and order-preserving mappings between them.
The developed theory is then applied to create a Python library which translates IBM
OpenPulse schedules to Quantify schedules. Further, this library was then used to
conduct single qubit characterisation experiments. Performed experiments include:
resonator spectroscopy, two-tone spectroscopy, Rabi oscillation, relaxation time (T1)
and qubit state discrimination experiments.
2023-01-01T00:00:00ZA Class-J Power Amplifier with Varactor Based Dynamic Load ModulationHallberg, Williamhttp://hdl.handle.net/20.500.12380/1995162023-02-10T08:39:10Z2014-01-01T00:00:00Zdc.title: A Class-J Power Amplifier with Varactor Based Dynamic Load Modulation
dc.contributor.author: Hallberg, William
dc.description.abstract: In order to reach increasingly higher data rates and energy requirements in mobile networks, energy efficiency and broadband operation in power amplifiers have been driving parameter in the research of wireless transmitters. This thesis presents the theory for a broadband design of a dynamic load modulated class-J power amplifier. Calculations show that a drain efficiency higher than 70% down to an output power back off of 7.7 dB can be maintained for a fractional bandwidth of 36% by tuning the transistor load reactance during the appropriate operating conditions. The modulation of the transistor load reactance can, for example, be achieved with varactors. The concept is demonstrated in a gallium nitride high electron mobility transistor power amplifier with silicon carbide varactors. The power amplifier achieved a power adde iency over 50% for 1.70 to 1.80 GHz down to 5 dB output power back off, with the maximum output power of 40.4dBm for continuous wave measurements. For modulated signals, the power amplifier showed excellent linearity and high efficiency. For a 3.84MHz 6:6 dB peak to average power ratio W-CDMA signal at 1.75 GHz, the power amplifier achieved an adjacent channel leakage ratio of -48 dBc, an average power added efficiency of 44.9% and an average power of 33.1 dBm. The correlation between theory, simulated results and measured results is discussed to show the potential of the broadband, dynamic load modulated class-J power amplifier concept.
2014-01-01T00:00:00ZA Fast Wafer-Level Reliability Study of Multi-Time Programmable (MTP) Memory DevicesKulshreshta, Kopalhttp://hdl.handle.net/20.500.12380/1535472019-07-03T12:46:11Z2011-01-01T00:00:00Zdc.title: A Fast Wafer-Level Reliability Study of Multi-Time Programmable (MTP) Memory Devices
dc.contributor.author: Kulshreshta, Kopal
dc.description.abstract: The task of this project was to devise a method for fast wafer level reliability testing of non-volatile memories for process development and qualification, in both siliconon-insulator (SOI) as well as CMOS bulk substrate technologies, with an aim to engineer out the conventional wafer baking step using an oven, thus, reducing the time and cost for reliability testing. This master thesis has been written during my internship in the reliability group of the front-end innovation department at NXP Semiconductors, Nijmegen, The Netherlands. The thesis report is divided into the following chapters. - Chapter 2 provides a basic overview of the types of non volatile memories relevant to this thesis - Chapter 3 is dedicated to multi-time programmable (MTP) memories; the device under study in this thesis project - Chapter 4 concerns the existing design for fast Wafer Level Reliability testing of MTP (fWLR-MTP) memory devices. - Chapter 5 discusses the thermal simulations performed on the existing 3-finger fWLR-MTP test structure using the COMSOL Multiphysics environment. - Chapter 6 focuses on the improvement of the existing fWLR MTP design to meet the project goals i.e. a temperature of 250 oC in the MTP device region. Also, the designs of the layout for the improved designs, which were sent for fabrication, are presented in this chapter. - Chapter 7 presents a summary of the project and also discusses the future impact of it.
2011-01-01T00:00:00ZA High Efficiency and Wideband Doherty Power Amplifier for 5GHünerli, Halil Volkanhttp://hdl.handle.net/20.500.12380/2508892023-02-10T08:37:38Z2017-01-01T00:00:00Zdc.title: A High Efficiency and Wideband Doherty Power Amplifier for 5G
dc.contributor.author: Hünerli, Halil Volkan
dc.description.abstract: In today’s wireless communications, mobile networks need high data rates and low power consumption. For this purpose, novel wideband and energy efficient power amplifiers should be designed. This thesis is concerned with this problem. Doherty Power Amplifiers (DPAs) are popular architectures for obtaining high average efficiency for a large range of output power levels. In this work, a DPA is designed using WIN Semiconductor’s 50μm GaAs pHEMT process and a monolithic microwave integrated circuit (MMIC) layout ready for tape-out fabrication in Ka-band is created. In this thesis, a power amplifier consisting of two stages; a DPA and a pre-amlifier for improved gain, is designed and simulated. Main and auxiliary cells of the DPA are fed through an unequal Wilkinson power splitter. The simulations show that peak power added efficiency (PAE) of 40% and gain > 15 dB is achieved for the 26.5-31.5 GHz band. The PAE levels of 26% at 6 dB back-off and 18% at 9 dB back off is achieved at the center frequency of 29 GHz. Output power is larger than 26 dBm for the defined band. These properties make this design a promising candidate for future 5G applications.
2017-01-01T00:00:00ZA Novel Method for the In-Situ Mechanical Characterization of Single Living Yeast Cells in an ESEMRam, Abilashhttp://hdl.handle.net/20.500.12380/1625112019-07-03T12:58:21Z2012-01-01T00:00:00Zdc.title: A Novel Method for the In-Situ Mechanical Characterization of Single Living Yeast Cells in an ESEM
dc.contributor.author: Ram, Abilash
dc.description.abstract: Water transport is a very important activity in living cells. Normally, water transport in living cells occurs by the process of osmosis. However, there are cases where faster water transport is necessary. Water channel proteins are expressed in cells where faster water transport is required. Aquaporin (AQP) an example of water channel proteins. They are produced by astrocytic cells in the human brain. When a human brain experiences oedema as a result of physical trauma, the increased inter-cranial pressure can in some circumstances result in a coma. Since oedema consists of fluids including water, there is a suspicion that the water channel proteins could be involved. A study of the protein and its effect on the rate of water transport in single cells can lead to the clinical and/or pharmaceutical development of suitable protein inhibitors. This thesis establishes a method for the study of single living yeast cells using an Atomic Force Microscopy sensor as part of a nanometer resolution and precision characterization system inside an Environmental Scanning Electron Microscope (ESEM). First, different preparation methods, for the yeast cell sample, were tested until a specific kind known as the liquid cell culture was identified as being suitable for the purpose of this thesis. Next, experiments for characterization of the AFM sensor were performed followed by the characterization of a single cell. Results show that the AFM sensor works best with the electron beam of the microscope turned off. Single yeast cells were also successfully characterized. There are more cases and effects to investigate, evaluate and overcome before the system is completely suitable for the study of single living yeast cells. However, the system shows promise and can become an easy and systematic procedure for the study of AQP and its effects on the rate of water transport in single living yeast cells.
2012-01-01T00:00:00ZActive electronically controlled IFF-antenna for L-bandNilsson, AlbinSchultze, Davidhttp://hdl.handle.net/20.500.12380/2561202023-02-10T08:38:26Z2018-01-01T00:00:00Zdc.title: Active electronically controlled IFF-antenna for L-band
dc.contributor.author: Nilsson, Albin; Schultze, David
dc.description.abstract: The projects purpose is to design, build and measure a transmitter and receiver module (TRM) and antenna prototype for an IFF/SSR system using Active Electronically Scanned Array (AESA) technique, which is unique in these systems. The project concludes the design, build and measurement of a TRM split in its basic blocks in the form of test circuits. An antenna array with 10+4 active elements are designed, build and measured in an anechoic chamber. The project successfully resulted in a theoretical power to each element of 953W at 1dB compression. The 2nd and 3rd harmonic generated from the system could be kept within the IFF standard limit with the manufactured filter in this project. The antenna constructed using dipoles has an active reflection factor of around 10 dB for the worst element at 0 steering angle, and at 60 steering angle it was 5dB for the worst element and edge frequency. The complete TRM was only in the design stage in this master thesis, the size of the design resulted in the dimensions 250x117mm. In conclusion, the power requirement for 700W per module was met and the power in 1 dB compression were 953W with losses after the power amplifier accounted for. The linear power from the amplifier yielded a power of 800W, also meeting the power requirements. The antenna did not meet the requirement of 10 dB return loss, however, the antenna design in itself resulted in a small and light antenna array which was desirable attributes in this project. The requirement for the size of the complete TRM was 250 mm x 120 mm and this requirement was met in the design stage for this project. There were two different phase shifters in this project and the conclusion was to go for the phase shifter designed with transmission lines instead of the IC circuit. This decision was made because the designed phase shifter had a lower and more even insertion loss. It also had a more predicable phase shift for 180°.
2018-01-01T00:00:00ZAn Antenna Integrated Low-Noise Receiver for mm-Wave Wideband, High-Datarate CommunicationCampion, Jameshttp://hdl.handle.net/20.500.12380/2280042023-02-10T08:40:03Z2015-01-01T00:00:00Zdc.title: An Antenna Integrated Low-Noise Receiver for mm-Wave Wideband, High-Datarate Communication
dc.contributor.author: Campion, James
dc.description.abstract: The continued growth in mobile network data traffic, forecast to increase at a compound rate of 54% annually, has created the need for wireless networks which can handle data rates orders of magnitude greater than is possible with current systems. This growth in data traffic necessitates the use of advanced techniques such as carrier-aggregation and MIMO in order to increase the capacity of wireless networks. In spite of these techniques, current wireless networks are insufficient to handle the predicted future levels of data traffic as their capacity is inherently limited by their narrow bandwidth. This dilemma has led to a surge in interest in the creation of wireless links at carrier frequencies far higher than currently used, where wide swathes of continuous bandwidth are readily available. One such band of frequencies, known as the H-band, lying between 200-325 GHz, has recently been allocated for use in wireless communication links by the Federal Communications Commission in the United States of America. The development of compound semiconductor materials, such as Indium Phosphide (InP), and advances in fabrication and processing techniques over the course of the past decade has enabled the creation of solid-state circuits at such frequencies. To date, many front-end low-noise amplifiers (LNAs) targeting H-band frequencies have reported noise figures of the order of 10 dB, with only moderate values of gain, thereby limiting the potential capacity of receiver systems. In light of this, this thesis presents the design of a mixer-first receiver for use at H-band frequencies which contains no front-end RF amplifier. Instead, the proposed receiver utilises a single-balanced topology consisting of an input RF quadrature hybrid, a single-balanced transconductance mixer, a pair of IF amplifiers and an active IF balun to perform down-conversion and amplification. An antenna is also integrated on chip to provide the input RF signal. The proposed receiver has IF and RF bandwidths of 42 and 138 GHz respectively and requires only 0 dBm of LO drive power to operate. Careful co-design of the transconductance mixer and IF amplifier ensures wideband IF operation of the receiver. The total conversion gain of the receiver is 23 dB and the simulated noise figure is between 13-15 dB over the entire IF bandwidth. The theoretical capacity of the receiver is somewhat greater than previously reported H-band receiver designs as a result of its wide IF bandwidth. The receiver is implemented using the TSC 250 InP double-heterojunction bipolar transistor (DHBT) process from Teledyne Scientific Corporation and consumes an area of 0.9x1.19 mm2. The design of each component of the receiver is presented, as well as a discussion of the trade-offs made in the design of the complete receiver, followed by a characterisation of the complete receiver and discussion of its performance.
2015-01-01T00:00:00ZAn In-Band OSNR Monitoring Method for Polarization Multiplexed QPSK Signals Using Stokes ParametersLundberg, Larshttp://hdl.handle.net/20.500.12380/1880582023-02-10T08:38:05Z2013-01-01T00:00:00Zdc.title: An In-Band OSNR Monitoring Method for Polarization Multiplexed QPSK Signals Using Stokes Parameters
dc.contributor.author: Lundberg, Lars
dc.description.abstract: The optical signal-to-noise ratio (OSNR) is an important parameter for measuring signal quality in optical communications systems. Due to the recent development of polarization multiplexed systems, Nyquist filtered systems and reconfigurable systems, the traditional optical spectrum analysis method for estimating the OSNR cannot be used. Several other methods have been proposed, with various shortcomings, so there is a need for other methods. In this work, an in-band OSNR monitoring method for polarization multiplexed signals based on a Stokes polarimeter has been investigated through theoretical studies, simulations and measurements. For the measurements, a 90 degree hybrid based polarimeter was constructed and used for measurements on noise loaded 28 GBd DP-QPSK signals. The impact of chromatic dispersion (CD) and polarization-mode dispersion (PMD) on the method was also investigated. The method was successfully used to estimate the OSNR within 1dB for OSNR values up to 25 dB. Through simulations it was shown that the tolerable amount of CD increased if the bandwidth used for the ADC was decreased. In the measurements of this work, a bandwidth of 10 MHz was used, which should tolerate over 1000 km of SMF with D = 17 ps/nm/km according to the simulations. However, the method was shown to be sensitive to PMD, tolerating a differential group delay of less than a tenth of the symbol time. Also developed in this work was a method for compensating for a non-ideal 90 degree hybrid. A provisional patent application has been filed for the method.
2013-01-01T00:00:00Z