Synthesis of Catalyst-free InAs Nanowires on Silicon

Examensarbete för masterexamen

Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.12380/241455
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dc.contributor.authorBadawy, Ghada
dc.contributor.departmentChalmers tekniska högskola / Institutionen för mikroteknologi och nanovetenskapsv
dc.contributor.departmentChalmers University of Technology / Department of Microtechnology and Nanoscienceen
dc.date.accessioned2019-07-03T14:19:57Z-
dc.date.available2019-07-03T14:19:57Z-
dc.date.issued2016
dc.identifier.urihttps://hdl.handle.net/20.500.12380/241455-
dc.description.abstractSemiconductor nanowires are nanometre-sized structures offering a wealth of unique and novel properties affiliated with their nanoscopic dimensions and are thus being extensively studied and appraised for their potential to reshape future electronic, photonic and sensing device applications. Of great significance, are nanowire (NW) synthesis techniques providing control over position, di- mensions and quality of these nanostructures, enabling the fabrication of nanowire-based devices with reproducible and predictable performance. Specific to this work, both bottom-up and top-down approaches are developed to acquire position-controlled arrays of indium arsenide (InAs) NWs on silicon (Si) substrates. In the bottom-up approach, selective-area growth of InAs NWs is demonstrated using molecular beam epitaxy (MBE) on pre-patterned SiO2-masked silicon substrates with (111) orientation. The patterning of the oxide mask is achieved via a cost-effective bottom-up technique, termed colloidal lithography, which relies on self-assembled colloidal particles on the surface to produce large scale templates with nanohole patterns. Effects of growth parameters and oxide mask quality on the NW growth are investigated. Furthermore, a theoretical growth model is developed to explain the size scaling behavior of NWs as a function of growth time, inter-wire spacing and growth temperature. This model calls attention to the presence of three growth regimes governing the NW growth kinetics depending on inter-wire distance. The top-down approach for the synthesis of in-plane NWs presented in this work relies on the patterning of high-quality epitaxial InAs thin films. The wires are obtained via wet chemical etching of InAs through a resist serving as an etch mask. The ordered NW arrays acquired are eventually transferred to a silicon substrate using an elastomeric stamp without loss of crystal orientation or arrangement.
dc.language.isoeng
dc.setspec.uppsokPhysicsChemistryMaths
dc.subjectMaterialvetenskap
dc.subjectNanovetenskap och nanoteknik
dc.subjectHållbar utveckling
dc.subjectMaterialteknik
dc.subjectNanoteknik
dc.subjectMaterials Science
dc.subjectNanoscience & Nanotechnology
dc.subjectSustainable Development
dc.subjectMaterials Engineering
dc.subjectNano Technology
dc.titleSynthesis of Catalyst-free InAs Nanowires on Silicon
dc.type.degreeExamensarbete för masterexamensv
dc.type.degreeMaster Thesisen
dc.type.uppsokH
Collection:Examensarbeten för masterexamen // Master Theses



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