Investigations of Josephson junction parameters for Rapid Single
| dc.contributor.author | Engseth, Henrik | |
| dc.contributor.department | Chalmers tekniska högskola / Institutionen för mikroteknologi och nanovetenskap | sv |
| dc.contributor.department | Chalmers University of Technology / Department of Microtechnology and Nanoscience | en |
| dc.date.accessioned | 2019-07-03T14:13:58Z | |
| dc.date.available | 2019-07-03T14:13:58Z | |
| dc.date.issued | 2003 | |
| dc.description.abstract | Abstract This diploma work is about Rapid Single Flux Quantum (RSFQ) circuits. This supercoducting digital circuitry has the most promising properties in terms of speed and power consumption. The active elements of the RSFQ circuits are Josephson junctions (JJ). For their fabrication low temperature superconducting niobium films are used. Today the design and fabrication of RSFQ circuits are done in a standardized way with well-defined design rules. Nevertheless, to design complicated circuits with more than several hundred junctions a lot of practical problems must be solved. Different aspects of the RSFQ circuits design process were investigated in this work. In the theoretical part we propose a new, more realistic model of the Josephson junction for physical simulation (which is necessarily used for design of every RSFQ gate) in order to improve its quality and precision. The new model for the JJ includes additional inductances, which must reflect a specific environment of the junction layout. The influence of parameter deviations was investigated in the simulation. As sources of the deviation we chose the spread of c (the Stewart-McCumber parameter) and that of the inductances. Then the operational margins of the basic elements of the RSFQ logic SR flip-flop were determined and compared with the prediction of the previously used model. To prove the results of simulations we designed a test structure of the SR flip-flop, with c=1 and c=2 for the wellestablished HYPRES technology (USA). Another part of the work is practical measurements. A test chip, containing chains of 100 Josephson junctions was designed and measured in order to estimate the spread of critical currents in real technology. | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12380/2053 | |
| dc.language.iso | eng | |
| dc.setspec.uppsok | PhysicsChemistryMaths | |
| dc.subject | Fysik | |
| dc.subject | Physical Sciences | |
| dc.title | Investigations of Josephson junction parameters for Rapid Single | |
| dc.type.degree | Examensarbete för masterexamen | sv |
| dc.type.degree | Master Thesis | en |
| dc.type.uppsok | H |