On-chip cache coherency evaluation for space applications: Snoop with AHB bus vs. directory with CHI NoC
Publicerad
Författare
Typ
Examensarbete för masterexamen
Master's Thesis
Master's Thesis
Modellbyggare
Tidskriftstitel
ISSN
Volymtitel
Utgivare
Sammanfattning
With the end of frequency scaling as a solution for more efficient processors, bigger
multi-core systems are getting increasingly popular, including in the space domain.
To achieve bigger high-performing multi-core systems, more efficient on-chip data
transfer systems are required which in turn are dependent on systems scaling. Increasing
the size of a multi-core system introduces more complexity in upholding coherency.
Different protocols and hardware mechanisms have been used for supporting
coherent systems, such as snooping and directory-based, which can be supported
by different interconnects. Although NoC-based interconnects and directory-based
mechanisms have been shown to successfully scale multi-core systems, past research
lacks a comparison of the coherence overhead introduced in NoC versus bus interconnects.
This thesis project has performed an evaluation and comparison of two protocols
for upholding coherency, AHB and CHI, used by Frontgrade Gaisler in their current
and future state-of-the-art radiation hardened microprocessors. Two evaluation
frameworks have been developed, one for each protocol, with configurable simulation
stimuli targeted for cache coherency. The limited experiments we managed to
perform in this project identified scenarios and topologies where the more expensive
CHI system will not deliver a higher and more scalable performance compared to
the more simple AHB system. This provides a valuable foundation for the next
step, that is performing quantitative analysis of the topologies where CHI delivers
superior performance as the system scales to a larger number of cores. However, due
to technical challenges we leave that part for future work. Improvements such as
increasing parallelism by using non-blocking components and sliced and distributed
last-level-cache, as well as using more advanced NoC routers with reduced latency
should be part of the future work that demonstrates the advantages of CHI over
AHB system. Performance gains in the evaluated CHI system could still be seen
when using a coherency protocol that allows for a write-back policy instead of writethrough.
Beskrivning
Ämne/nyckelord
Cache coherency, Network-on-Chip, AMBA AHB, AMBA CHI
