Verification, optimization and synthesis of sequences of operations

Examensarbete för masterexamen

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dc.contributor.authorAkkan, Gizem
dc.contributor.authorShoaei, Mohammad Reza
dc.contributor.departmentChalmers tekniska högskola / Institutionen för signaler och systemsv
dc.contributor.departmentChalmers University of Technology / Department of Signals and Systemsen
dc.date.accessioned2019-07-03T12:14:32Z-
dc.date.available2019-07-03T12:14:32Z-
dc.date.issued2009
dc.identifier.urihttps://hdl.handle.net/20.500.12380/95363-
dc.language.isoeng
dc.relation.ispartofseriesEx - Institutionen för signaler och system, Chalmers tekniska högskola : EX035/2009
dc.setspec.uppsokTechnology
dc.subjectElektroteknik och elektronik
dc.subjectElectrical Engineering, Electronic Engineering, Information Engineering
dc.titleVerification, optimization and synthesis of sequences of operations
dc.type.degreeExamensarbete för masterexamensv
dc.type.degreeMaster Thesisen
dc.type.uppsokH
Collection:Examensarbeten för masterexamen // Master Theses



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