Estimating the Influence on Execution Times from Shared Resources on a Dual-Core Processor
Examensarbete för masterexamen
The goal of this Master’s thesis is to estimate the influence of shared hardware resources on the worst-case execution time (WCET) of real-time tasks on a dual-core processor. The studied hardware is MPC5517E Microcontroller which is a dual-core 32-bit microcontroller unit (MCU), manufactured by Freescale Semiconductor. The invented measurement technique scrutinizes the impact of the secondary/slave core on the execution time of a task running on the primary/master core when both cores access a shared resource. First, the slave core is disabled (is not started), and the execution process takes place for a code fragment running on the master core, and the execution time is measured. Then, the slave core is enabled, and the cores run concurrently to access the shared system resources, principally the shared SRAM. The execution time of the task running on the master core is measured for the concurrent utilization of both cores to inspect the impact of the slave core on the master core. The executable binaries are generated using Freescale CodeWarrior Development Studio for MPC55XX/MPC56XX microcontrollers and the measurement is conducted using Freescale FreeMASTER. To have a quantitative criterion, in order to investigate the influence of the slave core on the master core, we define a factor known as the Slowdown Factor (SDF). The SDF reveals the extent at which the master core is influenced by the slave core. We try to find a upper band for this factor through developing some codes and carrying out a couple of measurements. In our survey, programs run either in the processor's internal flash or RAM. In addition, the primary core runs the same piece of code in all measurement scenarios, whereas the secondary core runs a varying code fragment to expose its impact on the primary core. One remarkable finding is that for a given piece of code, the SDF is not constant and it depends if the code runs in internal flash or RAM. This means that the master core can experience less or more impact from the slave core, depending on the type and target of the code running on the cores.
Informations- och kommunikationsteknik , Data- och informationsvetenskap , Information & Communication Technology , Computer and Information Science