Visualisation of state machines using the Sugiyama framework

Abstract

In this thesis a tool was developed to help Ericsson visualise state machines. In this process an evaluation of graph layout algorithms within the Sugiyama framework, a suitable method for drawing state machine diagrams, was conducted. The framework consists of four steps which are implemented and tested according to some chosen criteria for graph layouts. The steps are also tested in relation to each other so as to see if an algorithm used in one step can impact the quality of the solution for subsequent steps. Interestingly enough we saw that a seemingly worse performing algorithm in one step could actually improve the quality of the next step. We discuss these results and suggest that future work is needed to investigate if there are some properties of a graph that can indicate how well subsequent steps can perform.