Digital Hearing Aid Chip

Abstract

The main purpose of this thesis was to design and develop the FPGA based digital section of a Hearing Aid Chip. Another purpose of the thesis was to study different techniques used in hearing aids for signal processing like wavelets, uniform and non uniform filter banks and FFT. The design and development was divided into three different phases. In the first phase simulations in Matlab were carried out. In the second phase a software implementation was carried out and the firmware was designed for a soft processor. In the third phase everything was moved into hardware.