Data Prefetcher Based on a Temporal Convolutional Network

dc.contributor.authorLARSSON, MATTIAS
dc.contributor.departmentChalmers tekniska högskola / Institutionen för data och informationstekniksv
dc.contributor.departmentChalmers University of Technology / Department of Computer Science and Engineeringen
dc.contributor.examinerPericas, Miquel
dc.contributor.supervisorPetersen Moura Trancoso, Pedro
dc.date.accessioned2022-12-02T10:28:09Z
dc.date.available2022-12-02T10:28:09Z
dc.date.issued2022
dc.date.submitted2022
dc.description.abstractCache memory serves a crucial role in alleviating the difference in speed between the computer’s processor and main memory, which has become a growing problem over the years. However, the cache can only hide the whole memory access latency if the requested data is present in it, and only parts of it if the data is already on its way. For this reason, the technique called data prefetching has proven to be an effective way of increasing performance. This technique entails predicting which memory addresses will be accessed in the future and bringing the corresponding data to the cache ahead of time. This thesis explores the design of a data prefetcher based on a Temporal Convolutional Network (TCN), focusing on low storage overhead to make its corresponding implementation size realistic for hardware implementation. In performance simulation tests performed on 15 memory-intensive benchmarks, the TCN prefetcher achieved an average speedup of 30.5 % over a no prefetching baseline, while adding only 14.4 KB of storage overhead. The result shows that the TCN architecture can be a contender for future ML-based prefetchers and that it might work as a good substitute for larger multilayer perceptron (MLP) models. However, the results also suggest that the trade-offs necessary for practical implementation size of a neural network prefetcher make it challenging to advance the average performance beyond rule-based offset prefetchers.
dc.identifier.coursecodeDATX05
dc.identifier.urihttps://odr.chalmers.se/handle/20.500.12380/305866
dc.language.isoeng
dc.setspec.uppsokTechnology
dc.subjectdata prefetching
dc.subjectTCN
dc.subjectcache memory
dc.subjectmachine learning
dc.subjectcomputer architecture
dc.titleData Prefetcher Based on a Temporal Convolutional Network
dc.type.degreeExamensarbete för masterexamensv
dc.type.degreeMaster's Thesisen
dc.type.uppsokH
local.programmeHigh-performance computer systems (MPHPC), MSc
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