Timing Verification of Application Software in Multi-Core Systems

Abstract

Vehicles of today are becoming more autonomous with advanced technologies to obtain real-time information regarding the road and traffic situations. Computational processing must keep pace with this growth in order to meet the timing requirements. Timing constraints are crucial for a safety-critical automotive embedded system, as the consequence of ignoring timing could scale from loss of comfort to life threatening situations. Unfortunately, an Electronic Control Unit (ECU) with a single-core will not have enough computational capacity to perform heavy data processing in real-time to meet the timing constraints. So the automotive industry are replacing their traditional single-core ECUs with multicore ECUs which can perform parallel data processing to meet the timing constraints whenever necessary. The increasing functionality of automotive systems requires not only the use of complex hardware, but it is also very important to identify and prototype methods to capture and verify timing requirements for software components on such multi-core systems, as it impacts their safety as well as their perceived customer value. The aim of this project is to verify timing constraints for software components on a multi-core platform. The thesis shows how architectural models (EASTADL/ AUTOSAR) and models capable of precise timing analysis (AMALTHEA) shall be integrated/related for meticulous timing verification. This thesis automates the transformation of an EAST-ADL/AUTOSAR model to an AMALTHEA model, with the intention to retain the EAST-ADL/AUTOSAR models which are the standardized software architecture for automotive ECUs and use the AMALTHEA model only for precise timing verification. A comparison of the different tools that are capable of simulating AMALTHEA models is also presented. The results of this thesis work are a methodology and prototype tooling for precise timing verification in multi-core systems.