A Driving Assistance System with Hardware Acceleration
| dc.contributor.author | Cui, Gongpei | |
| dc.contributor.department | Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers) | sv |
| dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers) | en |
| dc.date.accessioned | 2019-07-03T13:36:26Z | |
| dc.date.available | 2019-07-03T13:36:26Z | |
| dc.date.issued | 2015 | |
| dc.description.abstract | Nowadays, active safety has become a hot research topic in vehicle industry. Active safety systems play an increasingly important role in warning drivers about and avoiding a collision or mitigating the consequences of the accident. The increased computational complexity requirement imposes a great challenge for the development of advanced active safety applications using the traditional Electronic Control Units (ECUs). One way to tackle this challenge is to use hardware offloading, which has the capability of exploiting massive parallelism and accelerating such applications. A hardware accelerator combined with software running on a general purpose processor can compose a hardware/software hybrid system. Model Based Development (MBD) is a common development scheme that reduces development time and time-to-market. In this project, we evaluate different MBD workflows for the hardware/software co-design and propose a general workflow for MATLAB/Simulink models. We investigate key techniques for hybrid system design and identify three factors to assist hardware/software partitioning. Moreover, several essential techniques for hardware logic implementation, such as pipelining, loop unrolling, and stream transmission, are analyzed based on system throughput and hardware resources. This project describes the workflow for hardware/software co-design based on MBD and finds methods to improve the system throughput combining hardware accelerators and software. Using the proposed profiling methods and partitioning roles, a matrix multiplication function is selected to be implemented by a hardware accelerator. Having optimized the hardware implementation scheme of the accelerator, a 5.4x speedup is achieved on a Zynq evaluation board. | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12380/213274 | |
| dc.language.iso | eng | |
| dc.setspec.uppsok | Technology | |
| dc.subject | Data- och informationsvetenskap | |
| dc.subject | Informations- och kommunikationsteknik | |
| dc.subject | Computer and Information Science | |
| dc.subject | Information & Communication Technology | |
| dc.title | A Driving Assistance System with Hardware Acceleration | |
| dc.type.degree | Examensarbete för masterexamen | sv |
| dc.type.degree | Master Thesis | en |
| dc.type.uppsok | H | |
| local.programme | Computer systems and networks (MPCSN), MSc |
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