GaN MMIC Oscillator Design for Low Phase Noise Using a Tunable Cavity Resonator

Abstract

One of the main limiting factors that prevents higher data rates in the communication systems of today is the phase noise of oscillators. To reach lower phase noise, the most effective improvement is to use resonators with higher quality factor (Q). On-chip resonators typically have poor quality factor so an external resonator is preferred from a performance perspective. Another way of lowering phase noise is to increase the power inside the oscillator, e.g., by using a high-power device technology. This thesis presents simulation and design of two Gallium Nitride (GaN) MMIC based reflection type oscillators with integrated phase shifters, designed in the WIN Semiconductors NP15 GaN HEMT technology. The integrated phase shifter can be used for compensating interconnect parasitics as well as phase locking with a PLL. The designs are intended for high-Q mechanically tunable cavity resonators for two different frequency bands, 11.6 to 13.0 GHz and 13.3 to 14.7 GHz. The thesis also presents transistor-model port de-embedding, required to extract a three-port transistor model from the two-port common-source model available in the design kit. Simulations based on WIN’s design kit, the de-embedded device model, and simulated cavity S parameters indicate minimum phase noise of -142 dBc/Hz at 100 kHz offset for the low-frequency band and -133 dBc/Hz at 100 kHz offset for the high-frequency band.