Adding a Composable Extension for Custom Instructions to the MicroBlaze-V core
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Examensarbete för masterexamen
Master's Thesis
Master's Thesis
Model builders
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Abstract
This report presents the design and implementation of a Composable Extension (CX) for custom instructions in the MicroBlaze-V core, which is a customisable RISC-V core offered by AMD. The implementation is done on a Field Programmable Gate Array (FPGA) and the performance is evaluated with accelerators against the current MicroBlaze-V design.
Integration of a new CX interface allows the designer to add any number of custom instructions and accelerators according to the requirement. The accelerators can be either freshly designed or by using the existing Xilinx Intellectual Property (IP) cores with additional parameters. In this project, existing IP cores have been used as accelerators as this demonstrates how easy it is to integrate the IP cores with the interface design.
The accelerator functions were also programmed in software using C to compare and analyze the performance of the CX extension in MicroBlaze-V. Different metrics like speedup, resource utilisation and power consumption were considered to evaluate the efficiency of the entire system. A significant performance improvement has been observed with the accelerators at the expense of higher resource utilisation.
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Keywords
Composable Extension (CX), Custom Instructions, Field Programmable Gate Array (FPGA), MicroBlaze-V, RISC-V, Accelerators, Intellectual Property (IP), Xilinx, Evaluation Metrics
