Adaptive core assignment for Adapteva Epiphany
| dc.contributor.author | Alveflo, Erik | |
| dc.contributor.department | Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers) | sv |
| dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers) | en |
| dc.date.accessioned | 2019-07-03T13:42:38Z | |
| dc.date.available | 2019-07-03T13:42:38Z | |
| dc.date.issued | 2015 | |
| dc.description.abstract | The number of cores in many-core processors is ever increasing, and so is the number of defects due to manufacturing variations and wear-out mechanisms. Sacri cing cores for increased longevity and manufacturing yield is cheap when thousands of cores are available. We propose two systems for tolerating faulty cores through software recon guration. The systems are based on remapping the user application when faults occur. Tasks are moved from faulty cores to reserved spare cores. Both systems were developed using a prototype based approach. One is inspired by the Epiphany Software Development Kit while the other utilizes simulated annealing to optimize distances between communicating tasks. Simulated annealing can automatically map applications while adhering to design constraints, but it can take 40 minutes to map an application with 4000 cores using the Parallella board's ARM processor. | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12380/219135 | |
| dc.language.iso | eng | |
| dc.setspec.uppsok | Technology | |
| dc.subject | Data- och informationsvetenskap | |
| dc.subject | Informations- och kommunikationsteknik | |
| dc.subject | Computer and Information Science | |
| dc.subject | Information & Communication Technology | |
| dc.title | Adaptive core assignment for Adapteva Epiphany | |
| dc.type.degree | Examensarbete för masterexamen | sv |
| dc.type.degree | Master Thesis | en |
| dc.type.uppsok | H | |
| local.programme | Embedded electronic system design (MPEES), MSc |
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