Beamforming of Multi-Channel Digital Radar System on System-on-Chip
dc.contributor.author | JOHANSSON, FREDRIK | |
dc.contributor.author | ÖGNELOD, LUKAS | |
dc.contributor.department | Chalmers tekniska högskola / Institutionen för data och informationsteknik | sv |
dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering | en |
dc.contributor.examiner | Larsson-Edefors, Per | |
dc.contributor.supervisor | Linde, Arne | |
dc.date.accessioned | 2022-11-30T14:51:37Z | |
dc.date.available | 2022-11-30T14:51:37Z | |
dc.date.issued | 2022 | |
dc.date.submitted | 2020 | |
dc.description.abstract | When speaking about radar systems, most people might straight away think about them being used for military operations but radar systems today are a part of everyday life. To deal with increasing amounts of data from larger antenna arrays while still having an agile system, FPGAs are a natural choice when dealing with high throughput applications as beamforming. This project explores the capabilities of the Xilinx Versal VCK190 ACAP, combining FPGA with a SIMD processor architecture called AI Engine to perform digital beamforming on radar signals. We realised an implementation of a digital beamforming system on a Versal VCK190 and were able to run continuously achieving a throughput of up to 7.8 Msamples/s. | |
dc.identifier.coursecode | DATX05 | |
dc.identifier.uri | https://odr.chalmers.se/handle/20.500.12380/305858 | |
dc.language.iso | eng | |
dc.setspec.uppsok | Technology | |
dc.subject | Computer science | |
dc.subject | Radar | |
dc.subject | beamforming | |
dc.subject | programmable hardware | |
dc.subject | FPGA | |
dc.subject | Xilinx Versal | |
dc.subject | AI Engine | |
dc.subject | AESA | |
dc.title | Beamforming of Multi-Channel Digital Radar System on System-on-Chip | |
dc.type.degree | Examensarbete för masterexamen | sv |
dc.type.degree | Master's Thesis | en |
dc.type.uppsok | H | |
local.programme | Embedded electronic system design (MPEES), MSc |