Browsar Examensarbeten för masterexamen // Master Theses efter Program "Communication Engineering (MPCOM), MSc"
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- PostDesign and Evaluation of a Software Abstraction Layer for Heterogeneous Neural Network Accelerators(2022) Sreedhar, Aishwarya; Nagarajan, Naga Sarayu; Chalmers tekniska högskola / Institutionen för data och informationsteknik; Chalmers University of Technology / Department of Computer Science and Engineering; Larsson-Edefors, Per; Pericas, MiquelMachine learning is becoming increasingly important across a wide range of hardware platforms. Current frameworks rely on vendor-specific operator libraries and cater to a small number of server-class GPUs. To be able to support a variety of hardware accelerators from various suppliers, which may vary over time, it is critical to abstract the hardware in order to deploy the core neural network algorithms nacross this heterogeneous hardware with minimal effort. There are various vendor specific consortiums and standards available in the market by the respective vendors. But to make the software portable, an abstraction layer should be build over the vendor proprietary standards. In this thesis, we have used a compiler that provides an abstraction level above CUDA and OpenCL so that we don’t bother to know the details about CUDA/OpenCL programming, One such type of a compiler is Apache TVM, which is a open source machine learning compiler framework for CPUs, GPUs and other hardware accelerators. We have performed a comprehensive comparison between the model compiled using Apache TVM framework and native compilation for two different hardware vendors such as Nvidia and Qualcomm. Framework models are fed into deep learning compilers, which provide optimised code for a range of deep learning hardware. It exposes graph and operator-level optimisations to enable deep learning workloads with performance portability across a variety of hardware backends. TVM tackles deep learning-specific optimization problems like high-level operator fusion, mapping to arbitrary hardware primitives, and memory latency hiding. It also uses a evolutionary, learning-based cost modeling method for quick exploration of code to automate the optimisation of low-level programs to hardware features. Experiments show that TVM delivers performance comparable to state-of-the-art, hand-tuned libraries for low-power CPUs, mobile GPUs, and server-class GPUs across hardware back-ends. TVM’s ability to target new accelerator back-ends, such as the GPU-based generic deep learning accelerator using CUDA and OpenCL is also demonstrated.
- PostPerformance Study of using Flooding in Industrial Wireless Sensor Networks(2011) BARAĆ, FILIP; Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers); Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers)The applications of Industrial Wireless Sensor Networks (IWSN) for Process Automation(PA) are time-critical and subject to strict requirements in terms of end-to-end delay and reliability of data delivery. A notable shortcoming of the existing wireless industrial communication standards is the existence of overcomplicated routing protocols, whose adequacy for the intended applications is questionable . The aim of this thesis is to evaluate a very well known data dissemination concept of flooding in an industrial setting, to address the viability of exploiting flooding and discover the consequent constraints and benefits for IWSN applications. The vanilla flooding concept is recycled by introducing a number of modifications to define a location-based routing protocol, whose performance is then evaluated in the QualNet simulation environment. The simulation results of all scenarios observed show that this lightweight approach is able to meet stringent performance requirements for networks of considerable sizes. Furthermore, it is shown that this solution significantly outperforms a number of conventional WSN routing protocols in all categories of interest.