Executing Simulink models on FPGA in a LabVIEW environment

Examensarbete för masterexamen

Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.12380/124113
Download file(s):
File SizeFormat 
124113.pdf583.23 kBAdobe PDFView/Open
Type: Examensarbete för masterexamen
Master Thesis
Title: Executing Simulink models on FPGA in a LabVIEW environment
Authors: Kindgren, Olof
Abstract: This paper describes the tools, methods and problems of converting Simulink models to IP blocks for FPGA and run them in the LabVIEW FPGA environ- ment. The conversion from Simulink models is performed with Mathworks Simulink HDL Coder, Xilinx System Generator and by manually writing HDL code to investigate the different aspects of the workflow. A proof-of-concept model is implemented with different parts converted with different methods. The analysis show that the automatic tools are useful for quickly implementing and verifying DSP models. It is also noticed that the tools in many cases produce suboptimal code and in these cases hand- written code is the only option. The target platform, National Instruments compactRIO, is considered useful as there are high-level communication read- ily available, simplifying the integration with other components. The biggest problem with the RIO platforms is the lack of control a developer has, once the IP is inserted in the LabVIEW FPGA design flow.
Keywords: Datorteknik;Computer Engineering
Issue Date: 2009
Publisher: Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers)
Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers)
URI: https://hdl.handle.net/20.500.12380/124113
Collection:Examensarbeten för masterexamen // Master Theses



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.