Implementation of NFS functionality in a 10G Ethernet based embedded field recorder in the domain of professional video storage

Examensarbete för masterexamen

Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.12380/215170
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Type: Examensarbete för masterexamen
Master Thesis
Title: Implementation of NFS functionality in a 10G Ethernet based embedded field recorder in the domain of professional video storage
Authors: Nguyen, Hoang
Abstract: The objective of this thesis project is to integrate a hardware-based network file system (NFS) functionality module into an existing FPGA-based network file interface (NFI) system - a project currently under development at Technicolor Hannover. In order to support the NFS functionality, a data transfer mechanism between the NFI system on the 10Gigabit Ethernet interface board (10GE board) and the user interface board is also implemented. For these purposes, several hardware modules, software modifications, and relevant data transfer mechanism are introduced. The particular challenges to solve are the compatibility of the new modules with the existing system, and the limitation of the interface pins between the boards. In the course of this thesis work, the project’s system architecture is presented and analyzed. A new communication architecture for data transfer between the boards has been proposed and implemented with the support of the currently available DCR bus and I2C bus interface. Furthermore, NFS functionality module, together with the support modules (timeout detector, application wrapper) are also implemented within the NFI system. Last but not least, the software on the FPGA embedded processor (the PowerPC) was modified in order to support the operations of NFS functionality and data transfer mechanism. Several interrupt signals with their handling procedures were added to ensure proper functionality of the new enhanced system. All those modules and mechanism were conceptually designed and implemented using Xilinx ISE development tools and VHDL, and verified with Mentor ModelSim and Xilinx ChipScope. The underlying FPGA technology is Xilinx Virtex 5.
Keywords: Data- och informationsvetenskap;Computer and Information Science
Issue Date: 2015
Publisher: Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers)
Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers)
URI: https://hdl.handle.net/20.500.12380/215170
Collection:Examensarbeten för masterexamen // Master Theses



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