Design of 28nm FD-SOI CMOS 800MS/s SAR ADC for wireless applications

Examensarbete för masterexamen

Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.12380/238305
Download file(s):
File Description SizeFormat 
238305.pdfFulltext3.41 MBAdobe PDFView/Open
Type: Examensarbete för masterexamen
Master Thesis
Title: Design of 28nm FD-SOI CMOS 800MS/s SAR ADC for wireless applications
Authors: Åberg, Victor
Abstract: As user expectations for higher bandwidth continue to rise, new techniques are required. One such is the massive-Multiple Input Multiple Output (MIMO), building on dozens or hundreds of antennas all having their own antenna. Making compact, low cost transceivers then becomes essential. Silicon technology fulfils the cost while suffering in terms of performance which needs to be compensated for by active pre-distortion which require an Analog-to-Digital Converter (ADC). This converter must have low power consumption, small footprint and achieve high sample rates in order to be useful. This work tries to fulfil these demands by implementing a Successive-Approximation- Register (SAR) Analog-to-Digital Converter (ADC) in a 28nm Fully Depleted Silicon on Insulator (FD-SOI) Complementary Metal-Oxide Semiconductor (CMOS) process. The converter has been implemented based on the principle of alternating comparators in combination with a redundantly scaled Capacitive Digital-to-Analog Converter (CDAC) that help increase the operation speed. The implementation also includes additional circuitry in order to support testing of the circuit. The implemented ADC shows an SNDR = 38.4 dB at a sample rate of 800MS/s. The converter consumes 1.1mW of power while doing this which results in a FoMW = 20.3 fJ/conversion step. This Figure of Merit (FoM) is among the lowest reported for high speed ADC.
Keywords: Informations- och kommunikationsteknik;Data- och informationsvetenskap;Information & Communication Technology;Computer and Information Science
Issue Date: 2016
Publisher: Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers)
Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers)
URI: https://hdl.handle.net/20.500.12380/238305
Collection:Examensarbeten för masterexamen // Master Theses



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.