Microcode Optimization in FlexCore Compiler

Abstract

The aim of this study was to investigate the microcode optimization in the compiler of an embedded processor (FlexCore). The main motivation behind this study was that the compiler was only able to perform front-end compiler optimization, failing to fully harness the processor’s potential. This was the problem that was in focus in this study.. This study has lead to a working implementation of filling delay slots optimization in the FlexCore compiler. A framework was used to read the FlexCore machine instruction, provide all the necessary information of each single instruction and then rewrite the optimized instructions. Filling delay slots optimization created redundant instructions, therefore another optimization was done to eliminate redundant instructions after the previous optimization. The optimizations lead to shorter processor execution time and, thus, a reduced energy expenditure. The simulator executes the FlexCore instructions and generates binary data codes which facilitate in analyzing the processor’s performance. Some EEMBC benchmarks are used to evaluate the result of optimization. All the benchmarks give positive results with respect to code size reduction, execution time reduction and energy dissipation. After the optimization the overall performance of FlexCore processor is increased by 11.5%.