Fast performance estimations for vector architectures using qemu-plugins
| dc.contributor.author | AMBALE GOPALAKRISHNA, HARISH | |
| dc.contributor.department | Chalmers tekniska högskola / Institutionen för data och informationsteknik | sv |
| dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering | en |
| dc.contributor.examiner | Pericas, Miquel | |
| dc.contributor.supervisor | Pericas, Miquel | |
| dc.date.accessioned | 2026-01-19T07:51:37Z | |
| dc.date.issued | 2025 | |
| dc.date.submitted | ||
| dc.description.abstract | New applications requiring high computations have arrived (AI, HPC, Cybersecurity etc..) leading to algorithm-hardware configuration exploration side-by-side. This has created the need for tools that can quickly navigate (and thereby prune) the wide design space to be explored by providing performance estimates in a short time-span. This thesis develops/extends a tool to provide performance estimates for an algorithm on a given hardware configuration having vector processing unit and cache hierarchy. It further validates the accuracy of results upon comparison with golden reference. | |
| dc.identifier.coursecode | DATX05 | |
| dc.identifier.uri | http://hdl.handle.net/20.500.12380/310913 | |
| dc.language.iso | eng | |
| dc.setspec.uppsok | Technology | |
| dc.subject | Computer | |
| dc.subject | science | |
| dc.subject | computer science | |
| dc.subject | engineering | |
| dc.subject | project | |
| dc.subject | thesis | |
| dc.title | Fast performance estimations for vector architectures using qemu-plugins | |
| dc.type.degree | Examensarbete för masterexamen | sv |
| dc.type.degree | Master's Thesis | en |
| dc.type.uppsok | H | |
| local.programme | High-performance computer systems (MPHPC), MSc |