Anomaly Detection on Power Input Using Machine Learning on Microcontroller Systems

Abstract

Robust −48V power input stages are essential for modern telecommunication equipment, including radio and baseband units. In practice, the input line experiences power-line disturbances (PLDs) such as square-wave ripple and voltage dips, which complicate real-time fault detection. Threshold-based protection is effective for wellknown cases but lacks adaptability to varying transients. This thesis develops and evaluates lightweight machine-learning methods for ondevice PLD classification on a resource-constrained microcontroller (MCU). A fourclass dataset (normal, ripple, milddip, severedip) is constructed by sampling at 1 kHz and segmenting signals into 20 ms windows, yielding 40,000 labeled examples. Three compact models are compared: a 1D convolutional neural network (1D-CNN), a long short-term memory (LSTM) network, and a hybrid CNN+LSTM. Models are trained and validated offline and then quantized with TensorFlow Lite (TFLite) for embedded deployment on an STM32G474. On the held-out test set, the 1D-CNN and the hybrid achieve accuracy and macro- F1 around > 99%, whereas the standalone LSTM is lower under the same 20 ms context. After full-integer (INT8) quantization, the 1D-CNN preserves accuracy while reducing the model size to about 21 kB and achieving ≈ 0.03 ms inference per 20 ms window, meeting real-time MCU constraints. In contrast, the recurrent models require SELECT_TF_OPS support in TFLite, which makes bare metal deployment less practical. These results demonstrate that a quantized 1D-CNN provides an effective and deployable solution for on-device monitoring of −48V power inputs, enabling reliable, low-latency anomaly detection in embedded telecommunication systems.