Design and implementation of a decompression engine for a Huffman-based compressed data cache

Abstract

This master thesis studies the implementation of a decompression engine for Huffman based compressed data cache. Decoding by traversing a Huffman tree bit by bit from the root is straightforward but has many implications. In order to store a Huffman tree, it requires too much memory resources, and the compressed memory content needs to be decompressed and recompressed when encoding changes. Besides, it may be slow and has varying decoding rate. The latter problem stems from that there is no specific boundary for each Huffman codeword. Among Huffman coding variations, Canonical Huffman coding has numerical features that facilitate the decoding process. Thus, by employing Canonical Huffman coding and pipelining, the performance of the decompression engine is promising. In this thesis, the specific design and implementation of the decompression engine is elaborated. Furthermore, the post-synthesis verification, time and power analyses are also described to show its validity and performance. Finally, the decompression engine can operate at 2.63 GHz and the power consumption is 51.835 mW, which is synthesized with 28nm process technology with -40℃ and 1.30V.