Implementation and Optimization of High Speed Symbol Timing Recovery Algorithms
dc.contributor.author | Ahmad, Tauseef | |
dc.contributor.department | Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers) | sv |
dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers) | en |
dc.date.accessioned | 2019-07-03T12:54:42Z | |
dc.date.available | 2019-07-03T12:54:42Z | |
dc.date.issued | 2012 | |
dc.description.abstract | Symbol synchronization has a cardinal role in high speed optical fiber communication systems. Accurate symbol synchronization is essential for reliable reception of data, whereas an erroneous synchronization mechanism can severely deteriorate the quality of the received signals and thus increase the bit error rate of the communication system. In this thesis work, two feedforward (Maximum Likelihood, Oerder & Meyer) and one feedback (Gardner) symbol timing recovery algorithms are implemented on a 65-nm ASIC technology. These algorithms are specifically designed for optical fiber communication systems and modified to fulfill the throughput requirement of 112 Gbit/s. Area and power consumption are key parameters used as cost function. The analysis shows that the OM algorithm is power efficient, but occupies more area than Gardner's algorithm. Some future work optimizations have been suggested that will make the OM algorithm consume the least area and power. The ML algorithm is found to be the least effective option and recommended not to be used in power critical communication systems. Different orders of interpolation blocks are also implemented on hardware and found to be overshadowing the resources occupied by the symbol timing recovery algorithms.Comparisons are made for various clock frequencies; higher clock frequency designs are found to be more area and power efficient than lower clock frequency designs. This master thesis report is a result of the project carried out along with two other Master thesis students, conducted in collaboration with the Computer Science and Engineering (CSE), Signals and Systems (S2) and Microtechnology and Nanoscience (MC2) departments at Chalmers. | |
dc.identifier.uri | https://hdl.handle.net/20.500.12380/161391 | |
dc.language.iso | eng | |
dc.setspec.uppsok | Technology | |
dc.subject | Datavetenskap (datalogi) | |
dc.subject | Computer Science | |
dc.title | Implementation and Optimization of High Speed Symbol Timing Recovery Algorithms | |
dc.type.degree | Examensarbete för masterexamen | sv |
dc.type.degree | Master Thesis | en |
dc.type.uppsok | H |
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