Development of a SpaceWire interface in VHDL
| dc.contributor.author | Juliusson, David | |
| dc.contributor.department | Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers) | sv |
| dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers) | en |
| dc.date.accessioned | 2019-07-03T12:49:16Z | |
| dc.date.available | 2019-07-03T12:49:16Z | |
| dc.date.issued | 2012 | |
| dc.description.abstract | In space, as on earth, there is a need for fast, reliable and reusable point-to-point data communication. The SpaceWire standard developed by the European Space Agency together with the European Space Industry and Academia aims to provide a unified standard that can support most data communication needs during space missions. The goal of this master thesis is to design and implement a SpaceWire Codec, compliant with the SpaceWire standard as described in ECSS-E-ST-50-12C, and make the design efficient enough to support the needs for the foreseeable future. During this master thesis a SpaceWire Codec have been designed, implemented and verified. During the design, focus has been on size, speed and re-usability as the preexisting solutions does not meet all the requirements emerging at RUAG Space AB. The SpaceWire Codec implemented during this theses is used to handle the low level reception and transmission of data and control characters over the SpaceWire link and provide an easy to use interface. Verification and synthesis of the SpaceWire Codec shows that the design can deliver contiguous transfer rates of one useful byte, transferred and received every BusClk, while still being lightweight in terms of digital logic. Further verification steps needs to be | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12380/157904 | |
| dc.language.iso | eng | |
| dc.setspec.uppsok | Technology | |
| dc.subject | Informations- och kommunikationsteknik | |
| dc.subject | Elektronik | |
| dc.subject | Information & Communication Technology | |
| dc.subject | Electronics | |
| dc.title | Development of a SpaceWire interface in VHDL | |
| dc.type.degree | Examensarbete för masterexamen | sv |
| dc.type.degree | Master Thesis | en |
| dc.type.uppsok | H |
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