Improving the Efficiency of SiC-based In- verter in BEV by Selecting the Switching Slew Rate for Optimisation of Switching Losses and Voltage Overshoot
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Examensarbete för masterexamen
Master's Thesis
Master's Thesis
Model builders
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Abstract
Silicon Carbide (SiC) inverters are increasingly utilized in Battery Electric Vehicles (BEVs) due to their superior efficiency and thermal performance compared to traditional silicon-based inverters. However, managing turn-off switching losses and voltage overshoot is a significant challenge that affects overall inverter performance and reliability. This thesis addresses these issues by investigating different value of turn-off gate resistors, applying a multi-step pulse strategy at the gate drive signal VGG, and incorporating a snubber circuit.
The methodologies were evaluated using a Double Pulse Test (DPT) setup in LTspice and a drive system model in PLECS. According to the DPT results, it was found that applying a multi-step pulse at VGG with appropriate magnitude and duration at lower Ids reduces current oscillation and voltage overshoot without significantly affecting current slew rate and turn-off switching losses. However, this method effectively decreases voltage overshoot and current slew rate at higher currents but slightly increases turn-off losses.
Additionally, based on the results from the simulations in LTspice and PLECS, larger gate resistors reduce voltage overshoots and slew rates but simultaneously increase turn-off energy and losses. The snubber circuit proved most effective in reducing the voltage overshoot. For minimizing switching energy and losses, the multi-step VGG method, with a 2V step voltage magnitude and 30ns duration, maintained switching losses similar to the original circuit with advantages at relatively lower current and torque levels, while the snubber circuit can be considered at higher currents and torque, as it effectively reduces voltage overshoot while the increase in switching losses is slight. Lastly, the effect of varying the DC link was investigated. The goal is to have the lowest losses for a DC link voltage. Increasing the DC voltage helps reduce conduction losses due to the decrease in current. Additionally, depending on if different methods are used, the voltage rating of the transistor can be reduced giving lower conduction losses. For the switching energy, the multi-step VGG method,
with a 2V step voltage magnitude and 30ns duration, is effective at relatively lower current levels, maintaining the total switching energy comparable to the original circuit while reducing the voltage overshoot. At higher currents, the snubber circuit is more effective, offering a balanced approach to decrease voltage overshoot and improving the efficiency of the BEV inverter.
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Keywords: SiC, Voltage Overshoot, Turn-off Losses, Gate Resistor, Snubber Circuit