Processchemaläggare för mångkärniga processorer Fördelning av minnesbelastning i NUMA-system
dc.contributor.author | Edholm, Daniel | |
dc.contributor.author | Nilsson, Viktor | |
dc.contributor.author | Löfgren, Anders | |
dc.contributor.department | Chalmers tekniska högskola / Institutionen för data- och informationsteknik (Chalmers) | sv |
dc.contributor.department | Chalmers University of Technology / Department of Computer Science and Engineering (Chalmers) | en |
dc.date.accessioned | 2019-07-03T13:31:36Z | |
dc.date.available | 2019-07-03T13:31:36Z | |
dc.date.issued | 2014 | |
dc.description.abstract | For systems with multicore processors contention for shared resources is a problem that occurs when several memory-intensive processes are executed in parallel within the same memory domain. This contention has a direct influence on the performance of the system and is a complex problem that has been recognized for a long time. An attractive and actively studied way to minimize this problem is by using a process scheduler adapted to allocate processor cores in a way such that contention for shared resources is minimized. With the introduction of multicore NUMA-systems (Non-Uniform Memory Access) the situation has become even more complex. In these systems the access time for processor cores to different memory domains vary depending on factors such as distance and load. Thus, the process scheduler also has to consider where the memory of each process is placed to minimize the distance and balance the load on each memory domain. This report presents a user-level process scheduler for a NUMA-system based on the multicore processor Tilera TILEPro64. The scheduler considers the load on each memory domain to guide the allocation of processor cores. The purpose is to spread the executing processes and thereby minimize memory access time. The results show that the scheduler achieves a small performance gain regarding execution time for several workloads. On the basis of these results the report discusses properties of the system and potential limitations in both the development environment and our implementation. | |
dc.identifier.uri | https://hdl.handle.net/20.500.12380/203696 | |
dc.language.iso | swe | |
dc.setspec.uppsok | Technology | |
dc.subject | Data- och informationsvetenskap | |
dc.subject | Computer and Information Science | |
dc.title | Processchemaläggare för mångkärniga processorer Fördelning av minnesbelastning i NUMA-system | |
dc.type.degree | Examensarbete för kandidatexamen | sv |
dc.type.degree | Bachelor Thesis | en |
dc.type.uppsok | M2 | |
local.programme | Datateknik 300 hp (civilingenjör) |
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