Executing Simulink models on FPGA in a LabVIEW environment

Abstract

This paper describes the tools, methods and problems of converting Simulink models to IP blocks for FPGA and run them in the LabVIEW FPGA environ- ment. The conversion from Simulink models is performed with Mathworks Simulink HDL Coder, Xilinx System Generator and by manually writing HDL code to investigate the different aspects of the workflow. A proof-of-concept model is implemented with different parts converted with different methods. The analysis show that the automatic tools are useful for quickly implementing and verifying DSP models. It is also noticed that the tools in many cases produce suboptimal code and in these cases hand- written code is the only option. The target platform, National Instruments compactRIO, is considered useful as there are high-level communication read- ily available, simplifying the integration with other components. The biggest problem with the RIO platforms is the lack of control a developer has, once the IP is inserted in the LabVIEW FPGA design flow.