Performance and Cost Analysis of GaN and Si Devices in Two-Level and Three-Level NPDC Voltage Source Inverter Topologies
| dc.contributor.author | Rehnberg, Alexander | |
| dc.contributor.author | Hakimi, Jawed | |
| dc.contributor.department | Chalmers tekniska högskola / Institutionen för elektroteknik | sv |
| dc.contributor.examiner | Lundberg, Stefan | |
| dc.contributor.supervisor | Meintanis, Dimitrios | |
| dc.date.accessioned | 2025-08-27T11:37:51Z | |
| dc.date.issued | 2025 | |
| dc.date.submitted | ||
| dc.description.abstract | Abstract This thesis presents a comparative study of two-level and three-level three-phase inverter topologies utilizing Silicon MOSFETs and Gallium Nitride HEMTs. The analysis focuses on performance metrics, including power loss, total harmonic distortion, common mode currents, and cost-effectiveness. The investigated system is a low-voltage (< 60 V DC) inverter intended to drive a permanent magnet synchronous machine-based water pump in data center cooling applications. All simulations are conducted in LTspice and the results show that the Gallium Nitride-based two-level inverter operating at 16 kHz achieves a system efficiency of 98.27 %, and a total harmonic distortion of 2.87 %. In contrast, the corresponding Silicon-based two-level inverter exhibits a lower efficiency, 97.79%, and a total harmonic distortion of 2.88 %. When the switching frequency of the Gallium Nitride two-level inverter is increased to 200 kHz, the total harmonic distortion is reduced significantly to 0.25 %, while the power loss increases slightly. Three-level neutral-point diode clamped inverters exhibit lower common mode currents due to reduced amplitude of the switching voltage. However, the three-level Gallium Nitride inverter at 200 kHz shows a slightly increased total harmonic distortion of 0.78 % compared to its two-level counterpart at the same frequency, which can be attributed to the non-ideal behavior of clamping diodes and voltage variations over the DC-link capacitors. Analyzing the theoretical and simulated power losses in the semiconductors, Gallium Nitride transistor showed a reduction of 86.21% in switching losses when compared to Silicon MOSFETs in a two-level inverter. The three-level Gallium nitride inverter further reduced the switching losses by 69.92% compared to the two-level Gallium nitride inverter. However, the conduction and diode losses in the neutral-point diode clamped inverter increased the total power loss, making the two-level inverter more efficient in comparison. At high switching frequencies, above 723 kHz, the theoretical model predicts that the three-level inverter will be more efficient. The cost analysis shows that although the Gallium Nitride-based two-level inverter has a higher initial cost, its improved efficiency offsets this over time. At a switching frequency of 16 kHz, the break-even point is approximately six years, after which the accumulated energy savings equal the additional upfront investment. | |
| dc.identifier.coursecode | EENX30 | |
| dc.identifier.uri | http://hdl.handle.net/20.500.12380/310389 | |
| dc.language.iso | eng | |
| dc.setspec.uppsok | Technology | |
| dc.title | Performance and Cost Analysis of GaN and Si Devices in Two-Level and Three-Level NPDC Voltage Source Inverter Topologies | |
| dc.type.degree | Examensarbete för masterexamen | sv |
| dc.type.degree | Master's Thesis | en |
| dc.type.uppsok | H | |
| local.programme | Electric power engineering (MPEPO), MSc |
